Conferences in DBLP

International Symposium on Microarchitecture (MICRO) (micro)
1987 (conf/micro/1987)

1. Hiroshi G. Okuno, Nobuyasu Osato, Ikuo Takeuchi
   Firmware approach to fast Lisp interpreter. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:1-11 [Conf]
   
2. Patrick M. Lenders
   Distributed microprogramming. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:12-14 [Conf]
   
3. Emilio Luque, Joan Sorribes, Ana Ripoll
   Tuning architecture at run-time. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:15-21 [Conf]
   
4. Takanobu Baba, Hiroshi Minakawa, Kenzo Okuda
   A visual microprogramming system. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:23-30 [Conf]
   
5. W. J. Chen, G. N. Reddy
   A computer aided design automation system for developing microprogrammed processors: a design approach through HDLs. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:31-35 [Conf]
   
6. Thomas Pittman, Lester Bartel
   Computer architecture simulation using a register transfer language. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:36-39 [Conf]
   
7. Mark Harris
   Extending microcode compaction for real architectures. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:40-53 [Conf]
   
8. Jayaram Bhasker
   An algorithm for microcode compaction of VHDL behavioral descriptions. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:54-58 [Conf]
   
9. Bogong Su, Shiyuan Ding, Jian Wang, Jinshi Xia
   Microcode compaction with timing constraints. [Citation Graph (0, 0)][DBLP]
   MICRO, 1987, pp:59-68 [Conf]
   
10. Kemal Ebcioglu
    A compilation technique for software pipelining of loops with conditional jumps. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:69-79 [Conf]
    
11. Jack S. Walicki, John D. Laughlin
    Operation scheduling in reconfigurable, multifunction pipelines. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:80-87 [Conf]
    
12. Bogong Su, Shiyuan Ding, Jian Wang, Jinshi Xia
    GURPR - a method for global software pipelining. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:88-96 [Conf]
    
13. Jayaram Bhasker, Tariq Samad
    Compacting MIMOLA microcode. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:97-105 [Conf]
    
14. Michael A. Howland, Robert A. Mueller, Philip H. Sweany
    Trace scheduling optimization in a retargetable microcode compiler. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:106-114 [Conf]
    
15. Vicki H. Allan, Robert A. Mueller
    Phase coupling for horizontal microcode generation. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:115-125 [Conf]
    
16. Lothar Nowak
    Graph based retargetable microcode compilation in the MIMOLA design system. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:126-132 [Conf]
    
17. Augustus K. Uht, Constantine D. Polychronopoulos, John F. Kolen
    On the combination of hardware and software concurrency extraction methods. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:133-141 [Conf]
    
18. Onat Menzilcioglu
    A case study in using two-level control stores. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:142-146 [Conf]
    
19. David W. Archer
    The instruction parsing microarchitecture of the CVAX microprocessor. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:147-153 [Conf]
    
20. Wen-mei W. Hwu, Yale N. Patt
    Exploiting horizontal and vertical concurrency via the HPSm microprocessor. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:154-161 [Conf]
    
21. James E. Wilson, Stephen W. Melvin, Michael Shebanow, Wen-mei W. Hwu, Yale N. Patt
    On tuning the microarchitecture of an HPS implementation of the VAX. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:162-167 [Conf]
    
22. Stephen W. Melvin, Yale N. Patt
    SPAM: a microcode based tool for tracing operating system events. [Citation Graph (0, 0)][DBLP]
    MICRO, 1987, pp:168-171 [Conf]