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Conferences in DBLP

International Symposium on Microarchitecture (MICRO) (micro)
1988 (conf/micro/1988)

  1. A. Bailas, Larry L. Kinney
    Evaluation of a concurrent error detection method for microprogrammed control units. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:1-10 [Conf]
  2. J. H. Jacobs, Augustus K. Uht, R. C. Ord
    Modeling the effects of instruction queue loading on a static instruction stream micro-architecture. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:11-20 [Conf]
  3. Pohua P. Chang, Wen-mei W. Hwu
    Trace selection for compiling large C application programs to microcode. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:21-29 [Conf]
  4. Andrew Wolfe, John Paul Shen
    Flexible processors: a promising application-specific processor design approach. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:30-39 [Conf]
  5. Ashok Singhal, Yale N. Patt
    Implementing a Prolog machine with multiple functional units. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:41-49 [Conf]
  6. J. A. Chandross, H. V. Jagadish, Abhaya Asthana
    The trap as a control flow mechanism. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:50-52 [Conf]
  7. James O. Bondi
    A microcoded real-time executive for numeric support nodes distributed within embedded networks. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:54-56 [Conf]
  8. Yashwant K. Malaiya, S. Feng
    Design of a testable RISC-to-CISC control architecture. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:57-59 [Conf]
  9. Stephen W. Melvin, Michael Shebanow, Yale N. Patt
    Hardware support for large atomic units in dynamically scheduled machines. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:60-63 [Conf]
  10. Andrew R. Pleszkun, Gurindar S. Sohi
    Multiple instruction issue and single-chip processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:64-66 [Conf]
  11. S. S. Ravi, Dechang Gu
    On approximation algorithms for microcode bit minimization. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:67-69 [Conf]
  12. L. Shih, Christos A. Papachristou
    Mapping of micro data flow computations on parallel microarchitectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:70-72 [Conf]
  13. D. Wong
    A high-speed hardware unit for a subset of logic resolution. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:73-78 [Conf]
  14. J. H. Chang, H. H. Chao, K. Lewis, M. Holland
    Control store implementation of a high performance VLSI CISC. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:79-82 [Conf]
  15. J. M. Mulder, R. J. Portier, A. Srivastava, R. in 't Velt
    Efficient macro-code emulation in hardwired pipelined processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:83-90 [Conf]
  16. Vicki H. Allan
    Data dependency graph bracing. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:91-93 [Conf]
  17. M. Andrews, F. Lam
    A new rapid prototyping firmware (RPF) tool. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:94-96 [Conf]
  18. Mauricio Breternitz Jr., John Paul Shen
    Organization of array data for concurrent memory access. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:97-99 [Conf]
  19. Edil S. Tavares Fernandes
    Microarchitecture modelling through ADL. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:100-104 [Conf]
  20. Hartmut Feuerhahn
    A data-flow driven resource allocation in a retargetable microcode compiler. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:105-107 [Conf]
  21. S. Molnar, M. C. Surles
    A microprogramming support tool for pipelined architectures. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:108-110 [Conf]
  22. Ken Rimey, Paul N. Hilfinger
    Lazy data routing and greedy scheduling for application-specific signal processors. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:111-115 [Conf]
  23. Bogong Su, Jian Wang, Jinshi Xia
    Global microcode compaction under timing constraints. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:116-118 [Conf]
  24. Sergio D'Angelo, L. Lisca, A. Proserpio, Giacomo R. Sechi
    Microprogramming in multiprocessor data acquisition system. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:120-133 [Conf]
  25. E. Binaghi, Gabriella Pasi, Giacomo R. Sechi
    The proposal of a computing model for prototypes of microprogrammed machines solving complex problems. [Citation Graph (0, 0)][DBLP]
    MICRO, 1988, pp:134-138 [Conf]
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