Conferences in DBLP
Message from the General Chair. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Message from the Program Chair. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] DefSim - The Educational Integrated Circuit for Defect Simulation. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Teaching Hardware Description and Verification. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Conference Committee. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Tools for In-Circuit Testing of On-Line Content Processing Hardware. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Technical Program Committee. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:- [Conf ] Wayne Burleson , Sheng Xu Digital Systems Design with ASIC and FPGA: A Novel Course Using CD/DVD and On-Line Formats. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:3-4 [Conf ] Saumil Merchant , Gregory D. Peterson , Donald W. Bouldin Improving Embedded Systems Education: Laboratory Enhancements Using Programmable Systems on Chip. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:5-6 [Conf ] Christophe Bobda Building Up a Course in Reconfigurable Computing. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:7-8 [Conf ] David Jeff Jackson , Kenneth G. Ricks FPGA-Based Autonomous Vehicle Competitions in a Capstone Design Course. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:9-10 [Conf ] David W. Parent , Eric J. Basham , Shao Ng , Paul B. Weil An Analog Leaf Cell for Analog Circuit Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:11-12 [Conf ] Eunok Kim , Janghyun Park A Study on Renovative Plan for Engineering Educational Curricula and Courses for SoC (System on Chip) Design Architects in Korea's IT Industry. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:13-14 [Conf ] Hugo Hedberg , Joachim Neves Rodrigues , Fredrik Kristensen , Henrik Svensson , Matthias Kamuf , Viktor Öwall Teaching Digital ASIC Design to Students with Heterogeneous Previous Knowledge. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:15-16 [Conf ] John D. Lynch , Daniel Hammerstrom , Roy Kravitz A Cohesive FPGA-Based System-on-Chip Design Curriculum. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:17-18 [Conf ] Juan P. Oliver , Fiorella Haim , Sebastian Fernandez , Javier Rodriguez , Pablo Rolando Hardware Lab at Home Possible with Ultra Low Cost Boards. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:19-20 [Conf ] Luís Gomes , Anikó Costa Remote Laboratory Support for an Introductory Microprocessor Course. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:21-22 [Conf ] Mar Martínez , Salvador Bracho Design of a Microelectronic Circuits Course Using Interactive Methods. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:23-24 [Conf ] Abner Barros , Pericles Lima , Juliana Xavier , Manoel E. Lima Teaching SoC Design in a Project-Oriented Course Based on Robotics. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:25-26 [Conf ] Marilia Lima , Andre Aziz , Diogo Alves , Patricia Lira , Vitor Schwambach , Edna Barros ipPROCESS: Using a Process to Teach IP-Core Development. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:27-28 [Conf ] Minsu Choi , Nohpill Park Teaching Nanotechnology by Introducing Crossbar-Based Architecture and Quantum-Dot Cellular Automata. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:29-30 [Conf ] Naehyuck Chang , Hyeonmin Lim , Kyungsoo Lee , Youngjin Cho , Hyung Gyu Lee , Hojun Shim Graduate Class for System-Level Low-Power Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:31-32 [Conf ] Numan Sadi Dogan , Paul D. Franzon , Wentai Liu Impact of an SoC Research Project on Microelectronics Education: A Case Study. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:33-34 [Conf ] R. James Duckworth Embedded System Design with FPGAs Using HDLs (Lessons Learned and Pitfalls to Be Avoided). [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:35-36 [Conf ] Rahul Sud , Megha Chaitanya Revolution in Electronic EDA Education/Research: GOSPL. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:37-38 [Conf ] Robert J. Bowman An Educational Program for Engineering Careers in Analog and Mixed-Signal Electronic Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:39-40 [Conf ] Sandeep K. Shukla Teaching Game Theory for Computer Engineering. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:41-42 [Conf ] Sanggyu Park , Soo-Ik Chae A Two-Week Program for a Platform-Based SoC Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:43-44 [Conf ] Vikram Jandhyala , Yasuo Kuga , David J. Allstot , C.-J. Richard Shi Bridging Circuits and Electromagnetics in a Curriculum Aimed at Microelectronic Analog and Microwave Simulation and Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:45-46 [Conf ] Johannes Grad , James E. Stine , David D. Neiman Real World SOC Experience for the Classroom. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:49-50 [Conf ] Carsten Bieser , Klaus D. Müller-Glaser , Jürgen Becker Hardware/Software Co-Training Lab: From VHDL Bit-Level Coding up to CASE-Tool Based System Modeling. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:51-52 [Conf ] Joseph Schneider , Mikel Bezdek , Ziyu Zhang , Zhao Zhang , Diane T. Rover A Platform FPGA-Based Hardware-Software Undergraduate Laboratory. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:53-54 [Conf ] Asim Smailagic , Daniel P. Siewiorek , Uwe Maurer , Anthony Rowe , Karen P. Tang A Context-Specific Electronic Design and Prototyping Course. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:57-58 [Conf ] Diego Fernando Jimenez Orostegui , Leandro Soares Indrusiak , Manfred Glesner Proxy-Based Integration of Reconfigurable Hardware Within Simulation Environments: Improving E-Learning Experience in Microelectronics. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:59-60 [Conf ] Donald Hung Teaching SoC-Oriented Computer Design Course. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:61-62 [Conf ] Donald Y. C. Lie What Comes After Most Semiconductor Fabs Are "OutSourced" to Asia? Major Challenges in Educating Future RF/Analog IC Designers in the U.S.. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:63-64 [Conf ] Jean-Samuel Chenard , Ahmed Usman Khalid , M. Prokic , Rong Zhang , K.-L. Lim , Atanu Chattopadhyay , Zeljko Zilic Expandable and Robust Laboratory for Microprocessor Systems. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:65-66 [Conf ] James E. Stine , Johannes Grad , Ivan D. Castellanos , Jeff M. Blank , Vibhuti B. Dave , Mallika Prakash , Nick Iliev , Nathan Jachimiec A Framework for High-Level Synthesis of System-on-Chip Designs. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:67-68 [Conf ] James O. Hamblen Using Second Generation SOPC Boards for Student Design Projects. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:69-70 [Conf ] Jari Nurmi , Jan Madsen , Erwin Ofner , Jouni Isoaho , Hannu Tenhunen The SoC-Mobinet Model in System-on-Chip Education. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:71-72 [Conf ] Jean-Francois Thibeault , Mortimer Hubin , Francois Deslauriers , Patrick Samson , Guy Bois A Reprogrammable SoC Design for a Real-Time Control Application. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:73-74 [Conf ] Joachim Neves Rodrigues , Matthias Kamuf , Hugo Hedberg , Viktor Öwall A Manual on ASIC Front to Back End Design Flow. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:75-76 [Conf ] John A. Nestor Teaching Computer Organization with HDLs: An Incremental Approach. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:77-78 [Conf ] Kang Yi , Kyeong-Hoon Jung Partnership Between Venture Companies and Universities Through Student's Extra-Curriculum Activities. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:79-80 [Conf ] Dong-Ha Lee , Kyeong-Hoon Jung , Kang Yi , Yun-Seok Cho , Youn-Sik Han , Deuk-Cheol Kang Development of Partnership Between Industry and University via Customized Field-Oriented Curriculum. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:81-82 [Conf ] M. Balakrishnan , B. S. Panwar A Specialized Graduate Program in VLSI Design Tools and Technology. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:83-84 [Conf ] Manik Gadhiok , Ricky Hardy , Patrick Murphy , J. Patrick Frantz , Hyeokho Choi , Joseph R. Cavallaro An FPGA-Based Daughtercard for TI's C6000 family of DSKs. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:85-86 [Conf ] Manish Pradhan Simplified Micro-Controller and FPGA Platform for DSP Applications. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:87-88 [Conf ] Michael A. Shanblatt , Brian Foulds A Simulink-to-FPGA Implementation Tool for Enhanced Design Flow. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:89-90 [Conf ] Michael J. Wirthlin Senior-Level Embedded Systems Design Project Using FPGAs. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:91-92 [Conf ] Pallavi Shurpali , Ravi Shankar , Ellie Shuff On Ensuring Safety and Liveness Properties of Concurrent Models in SystemC. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:93-94 [Conf ] Robert D. Walstrom , Joseph Schneider , Diane T. Rover Teaching System-Level Design Using SpecC and SystemC. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:95-96 [Conf ] Roger D. Chamberlain , John W. Lockwood , Saurabh Gayen , Richard Hough , Phillip Jones Use of a Soft-Core Processor in a Hardware/Software Codesign Laboratory. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:97-98 [Conf ] Ryuichi Takahashi , Hajime Ohiwa Legitimate Peripheral Participation on FPGA for Fine-Grain Microprocessor Design Education. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:99-100 [Conf ] Sarah Harris , David Harris Inexpensive Student-Assembled FPGA/Microcontroller Board. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:101-102 [Conf ] Hugo Hedberg , Thomas Lenart , Henrik Svensson A Complete MP3 Decoder on a Chip. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:103-104 [Conf ] Luís Gomes , Anikó Costa Teaching Formal Methods Within System-on-a-Programmable-Chip Design. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:105-106 [Conf ] Justin Gregg , Tom W. Chen PEER: Enriching Secondary Engineering Education Through a College Summer Camp. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:109-110 [Conf ] Robert H. Klenke A UAV-Based Computer Engineering Capstone Senior Design Project. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:111-112 [Conf ] Bjorn B. Larsen Experts-in-Team, Interdisciplinary Project. [Citation Graph (0, 0)][DBLP ] MSE, 2005, pp:113-114 [Conf ]