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Conferences in DBLP

Microelectronics Systems Education (mse)
2003 (conf/mse/2003)

  1. Murali R. Varanasi
    Computing Curricula - Computer Engineering. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:2-0 [Conf]
  2. Volnei A. Pedroni
    Teaching Design-Oriented VHDL. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:6-7 [Conf]
  3. Scott Hauck
    APHYDS: The Academic Physical Design Skeleton. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:8-9 [Conf]
  4. Gang Qu
    Introducing The Concept Of Design Reuse Into Undergraduate Digital Design Curriculum. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:10-11 [Conf]
  5. Mark Holland, James Harris, Scott Hauck
    Harnessing FPGAs for Computer Architecture Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:12-13 [Conf]
  6. G. Gautier, S. Crand, Olivier Bonnaud
    Dynamic electrical characterization of CMOS-like Thin Film Transistor circuits. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:14-15 [Conf]
  7. Aleksandar Milenkovic, David Fatzer
    Teaching IP Core Development: An Example. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:16-17 [Conf]
  8. James O. Hamblen
    Using an FPGA-based SOC Approach for Senior Design Projects. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:18-19 [Conf]
  9. Javier García Zubía
    Educational Software for Digital Electronics: BOOLE-DEUSTO. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:20-22 [Conf]
  10. Eric W. Johnson
    Extensive Introduction to VHDL and PLDs in the Sophomore Year. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:23-24 [Conf]
  11. Yong Ping Xu
    A Two-semester Project-based Mixed-signal IC Design Course Using Commercial EDA Tools - From Design to Chip Evaluation. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:25-26 [Conf]
  12. Robert H. Klenke, James H. Aylor
    A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:27-28 [Conf]
  13. K. C. Shet
    Manpower Development in VLSI ni India: A Case Study. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:29-30 [Conf]
  14. Hugo Hedberg, Thomas Lenart, Henrik Svensson, Peter Nilsson, Viktor Öwall
    Teaching Digital HW-Design by Implementing a Complete MP3 Decoder. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:31-32 [Conf]
  15. Ton J. Mouthaan, Wouter Olthuis, Henk Vos
    Competence-Based EE-Learning: (How) Can We Implement It? [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:33-34 [Conf]
  16. Jason J. Hein, James H. Aylor, Robert H. Klenke
    Performance-Based System Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:35-36 [Conf]
  17. David L. Landis, James T. Cain
    Microelectronics Education As Workforce Development. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:37-38 [Conf]
  18. Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis
    The Sandbox Design Experience Course. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:39-40 [Conf]
  19. Tohru Ishihara, Satoshi Komatsu, Makoto Ikeda, Masahiro Fujita, Kunihiro Asada
    Comparative Study On Verilog-Based And C-Based Hardware Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:41-42 [Conf]
  20. Patricia Giacomelli, Márcio C. Schneider, Carlos Galup-Montoro
    MOSVIEW: A Graphical Tool for MOS Analog Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:43-44 [Conf]
  21. Carl Das, John A. McLean
    The EUROPRACTICE Mini@Sic Program. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:45-46 [Conf]
  22. Thomas Kroll, Herman Schmit, Dave Landis
    CAD Tool Support For A Multi-University Soc Certificate Program: The Digital Sandbox. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:47-48 [Conf]
  23. Naehyuck Chang, Ikhwan Lee
    Embedded System Hardware Design Course Track For Cs Students. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:49-50 [Conf]
  24. Michael A. Shanblatt, Brian Foulds, Patrick Kane, Anna Acevedo
    A University-based Web Resource Supporting the Xilinx University Program. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:51-52 [Conf]
  25. Patrick R. Schulz, Ulrich Brüning, Gunter Strube
    SEED2002 Support of Educational course for Electronic Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:53-54 [Conf]
  26. Daniel Donoval, Daniel Hajtas
    Team Project - An Effective Tool for Application of Knowledge and Deriving Engineering Competencies. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:55-56 [Conf]
  27. Leandro Soares Indrusiak, Manfred Glesner, Ricardo Augusto da Luz Reis, Giuliana Alcántara, Stefan Hoermann, Ralf Steinmetz
    Reducing Authoring Costs of Online Training in Microelectronics Design by Reusing Design Documentation Content. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:57-58 [Conf]
  28. Michael Callaghan, Jim Harkin, Chris Peters, T. Martin McGinnity, Liam P. Maguire
    A Collaborative Environment for Remote Experimentation. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:59-0 [Conf]
  29. Kazuo Sakiyama, Patrick Schaumont, David Hwang, Ingrid Verbauwhede
    Teaching Trade-offs in System-level Design Methodologies. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:62-53 [Conf]
  30. Patrick Murphy, J. Patrick Frantz, Erik Welsh, Ricky Hardy, Tinoosh Mohsenin, Joseph R. Cavallaro
    VALID: Custom ASIC Verification and FPGA Education Platform. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:64-65 [Conf]
  31. Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins
    A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:66-67 [Conf]
  32. Marc Bertola, Guy Bois
    Teaching Bus Architectures with a Basic, Hands-On SOC Platform. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:68-0 [Conf]
  33. Frank Vahid
    Embedded System Design: UCR's Undergraduate Three-Course Sequence. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:72-73 [Conf]
  34. David Harris, David Diaz
    TestosterICs: A Low-Cost Functional Chip Tester. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:74-75 [Conf]
  35. Jayanta Mukherjee, Jason Parry, WenHua Dai, Patrick Roblin, Steven Bibyk, Jongsoo Lee
    RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:76-77 [Conf]
  36. Avril E. Manners, Steven P. Beaumont
    Development and Operation of a Distance Learning Programme in System Level Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:78-79 [Conf]
  37. Asim Smailagic, Daniel P. Siewiorek, Lu Luo
    A System Design and Rapid Prototyping of Wearable Computers Course. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:80-82 [Conf]
  38. Andrzej Rucinski, Barrett Stetson, S. T. P. Brundavani
    A DOT1 & DOT4 MOSIS - Compatible Library. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:83-84 [Conf]
  39. Yves Bertrand, Marie-Lise Flottes, L. Balado, Joan Figueras, Anton Biasizzo, Franc Novak, Stefano Di Carlo, Paolo Prinetto, N. Pricopi, Hans-Joachim Wunderlich, J.-P. Van der Heyden
    Test Engineering Education in Europe: the EuNICE-Test Project. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:85-86 [Conf]
  40. David W. Parent
    University/Industry Relationships at San Jose State University to Produce Industry?s Ideal New Hire. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:87-88 [Conf]
  41. John A. Nestor, David A. Rich
    Integrating Digital, Analog, and Mixed-Signal Design in an Undergraduate ECE Curriculum. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:89-90 [Conf]
  42. Antonio F. Mondragón-Torres, Terry Mayhugh Jr., José Pineda de Gyvez, José Silva-Martínez, Edgar Sánchez-Sinencio
    An Analog Integrated Circuit Design Laboratory. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:91-92 [Conf]
  43. Vinícius P. Correia, Marcelo Lubaszewski, André Inácio Reis
    SIFU! - A Didactic Stuck-at Fault Simulator. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:93-94 [Conf]
  44. Gary H. Bernstein, Jay B. Brockman, Peter M. Kogge, Gregory L. Snider, Barbara E. Walvoord
    From Bits to Chips: A Multidisciplinary Curriculum for Microelectronics System Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:95-97 [Conf]
  45. Johannes Grad, James E. Stine
    A Standard Cell Library for Student Projects. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:98-99 [Conf]
  46. Linda M. Head
    Incorporating EDA into the Rowan ECE Curriculum. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:100-101 [Conf]
  47. Peter Marwedel, Birgit Sirocic
    Overcoming The Limitations of Traditional Media For Teaching Modern Processor Desing. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:102-103 [Conf]
  48. Jayanta Choudhury, Kuldeep Rawat, Guna Seetharaman, Gholam Massiha
    Initiating A Program In Nanotechnology Through A Structured Curriculum. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:104-105 [Conf]
  49. Derek B. Gottlieb, Nicholas P. Carter
    Microprocessor Interfacing Laboratory. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:106-107 [Conf]
  50. Joanne DeGroat, Arun Raman, Bakr Younis
    A Design Project for System Design with SystemC. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:108-109 [Conf]
  51. Alexandre Casacurta, Marcel Furtado Almeida, Ricardo Augusto da Luz Reis
    A Visual Simulation Tool at Layout Level. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:110-111 [Conf]
  52. Lokesh Verma, Hardy J. Pottinger, Daryl G. Beetner
    A Software Debugger Interface for an 8051 Hardware Model. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:112-114 [Conf]
  53. Timm Ostermann, C. Lackner, R. Koessl, Richard Hagelauer, K. Beer, Ludger Krahn, H.-T. Mammen, Werner John, Anton Sauer, P. Schwarz, Günter Elst, M. Pistauer
    LIMA: The New e-Learning Platform in Microelectronic Applications. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:115-116 [Conf]
  54. David Lim, Christopher E. Neely, Christopher K. Zuver, John W. Lockwood
    Internet-based Tool for System-on-Chip Integration. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:117-118 [Conf]
  55. Christopher K. Zuver, Christopher E. Neely, John W. Lockwood
    Internet-based Tool for System-On-Chip Project Testing and Grading. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:119-120 [Conf]
  56. Minsu Choi, Hardy J. Pottinger, Nohpill Park, Yong-Bin Kim
    Need For Undergraduate And Graduate-Level Education In Testing Of Microelectronic Circuits And Systems. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:121-122 [Conf]
  57. Tina A. Hudson, Edward R. Doering
    Custom Chips Developed to Reinforce Learning Integrated Circuit Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:123-125 [Conf]
  58. Ivan S. Kourtev, Raymond R. Hoare, Steven P. Levitan, Tom Cain, Bruce R. Childers, Donald M. Chiarulli, David L. Landis
    Short Courses in System-on-a-Chip (SoC) Design. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:126-127 [Conf]
  59. Raymond Hoare, Shen Chih Tung
    Combining Mentor Graphics? HDL Designer FPGA Flow with a Reconfigurable System on a Programmable Chip, Educational Opportunity or Insanity? [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:128-130 [Conf]
  60. Donald Hung, John Vien, Wendy Chan, Chi-wei Fu
    Developing a Teaching Environment for Rapid Design and Verification of Complex Digital/Computing Systems. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:131-133 [Conf]
  61. Jens E. Becker, Carsten Bieser, Alexander Thomas, Klaus D. Müller-Glaser, Jürgen Becker
    Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:134-135 [Conf]
  62. Ghaiyyur Quraishi, Ravi Shankar
    On simulating the IP Market Dynamics in an Academic Environment Using SystemC. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:136-138 [Conf]
  63. Donald W. Bouldin, Adam Miller, Chandra Tan
    Teaching Custom Integrated Circuit Design and Verification. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:139-140 [Conf]
  64. Frantisek Uherek, Daniel Donoval
    Concept for Teaching Optoelectronics and Laser Systems in the Microelectronics Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:141-0 [Conf]
  65. Grant Martin
    Industry Needs and Expectations of SoC Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:146-147 [Conf]
  66. Andrew Laffely, Wayne Burleson
    Using System On-A-Chip As A Vehicle For VLSI Design Education. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:148-149 [Conf]
  67. Wei-Chang Tsai, Chun-Ming Huang, Jiann-Jenn Wang, Chen-Yi Lee
    Infrastructure for Education and Research of SOC/IP in Taiwan. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:150-0 [Conf]
  68. Robert L. Ewing, Hoda S. Abdel-Aty-Zohdy
    Paradigm Of Design For Biosystem-On-A-Chip(BioSoC). [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:154-155 [Conf]
  69. Wallace B. Leigh
    Simplifying Analog CMOS Design for Undergraduates. [Citation Graph (0, 0)][DBLP]
    MSE, 2003, pp:156-0 [Conf]
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