Conferences in DBLP
Manfred Reitenspieß High-Availability and Standards - The Wag to Go! [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:12-18 [Conf ] Fevzi Belli , Christof J. Budnik , Nimal Nissanke Finite-State Modeling, Analysis and Testing of System Vulnerabilities. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:19-33 [Conf ] Timm Grams Root Cause Analysis as a Guide to SRE Methods. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:34-43 [Conf ] Michael Schöttner , Stefan Frenz , Ralph Göckelmann , Peter Schulthess Fault Tolerance in a DSM Cluster Operating System. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:44-53 [Conf ] Jens Chr. Lisner A Flexible Slotting Scheme for TDMA-Based Protocols. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:54-65 [Conf ] Spiro Trikaliotis Utilizing Fault Tolerance for Achieving QoS in Ad-hoc Networks. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:66-75 [Conf ] A. Morozov , Michael Gössel , V. V. Saposhnikov , Vl. V. Saposhnikow Complementary Circuits for On-Line Detection for 1-out-of-3 Codes. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:76-83 [Conf ] Egor S. Sogomonyan , Daniel Marienfeld , Vitalij Ocheretnij , Michael Gössel Self-checking Carry-selectAdder with Sum-bit Duplication. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:84-91 [Conf ] Hans-Dieter Kochs , Jörg Petersen A Framework for Dependability Evaluation of Mechatronic Units. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:92-105 [Conf ] Talal Arnaout , Peter Göhner , Hans-Joachim Wunderlich , Eduard Zimmer Reliability Considerations forMechatronic Systems on the Basis of a State Model. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:106-112 [Conf ] András Pataricza , Ferenc Györ Towards Unified Dependability Modeling and Analysis. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:113-122 [Conf ] Oliver Tschäche Deriving Dependability Measures of Measurements Recorded in a Matrix. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:123-132 [Conf ] Nico Kasprzyk , Andreas Koch Verbesserte Hardware-Software-Partitionierung für Adaptive Computer. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:135-144 [Conf ] Adronis Niyonkuru , Hans Christoph Zeidler Evaluation of Run-Time Reconfiguration for General-Purpose Computing. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:145-154 [Conf ] Thilo Pionteck , Thomas Stiefmeier , Thorsten Staake , Lukusa D. Kabulepa , Manfred Glesner Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:155-164 [Conf ] Alexander Thomas , Jürgen Becker Aufbau- und Strukturkonzepte einer adaptive multigranularen rekonfigurierbaren Hardwarearchitektur. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:165-174 [Conf ] Sebastian Lange , Martin Middendorf Hyperreconfigurable Architectures as Flexible Control Systems. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:175-184 [Conf ] Ronald Hecht , Dirk Timmermann , Stephan Kubisch , Elmar Zeeb Network-on-Chip basierende Laufzeitsysteme für dynamische rekonfigurierbare Hardware. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:185-194 [Conf ] Klaus Danne Operating Systems for FPGA Based Computers and Their Memory. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:195-204 [Conf ] Christophe Bobda , Ali Ahmadinia , Jürgen Teich Generation of Distributed Arithmetic Designs for Reconfigurable Application. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:205-214 [Conf ] Jörg Schneider , Vincent Kotzsch Wiederverwendungsgerechte Codegenerierung von FEC-Applikationen für dynamisch rekonfigurierbare Systeme. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:215-224 [Conf ] Walter Stechele , Stephan Herrmann , Andreas Herkersdorf Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:225-234 [Conf ] Heiko Kalte , Mario Porrmann , Ulrich Rückert Leistungsbewertung unterschiedlicher Einbettungsvariaten dynamisch rekonfigurierbarer Hardware. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:235-244 [Conf ] Werner Eisenberg , Uwe Renner Zur Beschreibung grobgranularer Schüttgüter mit zellulären Automaten. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:247-262 [Conf ] Wolfgang Fritzsche An approach to molecular electronics by self organization of molecular units. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:253-258 [Conf ] Carlos A. Silva , Thomas A. Runkler Ant Colony Optimization for dynamic Traveling Salesman Problems. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:259-266 [Conf ] Helmut Kiesewetter DIGORGAO - A Digital Problem Solution Concept. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:267-274 [Conf ] Jörg Schreiter , Ulrich Ramacher , Arne Heittmann , Daniel Matolin , René Schüffny Pulse coupled neural networks with adaptive synapses for image segmentation. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:275-282 [Conf ] Wolfram Krause , Ingmar Glauche , Rudolf Sollacher , Martin Greiner Towards a Selforganized Control of Wireless Multihop Ad Hoc Communication Networks. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:283-290 [Conf ] K.-M. Reiß Kreuzkatalytische Netzwerke als Wirtschaftsprinzip. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:291-296 [Conf ] Dietmar Fey , Daniel Schmidt , Andreas Loos Reconfigurable OPTO-ASICs as base for future self-organizing CMOS cameras. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:297-304 [Conf ] Thomas Lippert Quantum Computers and Their Simulation. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:308- [Conf ] Mathias Halbach , Rolf Hoffmann , Patrick Röder FPGA Implementation of Cellular Automata Compared to Software Implementation. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:309-317 [Conf ] Rainer Buchty Modelling Cryptonite - On the Design of a Programmable High-Performance Crypto Processor. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:319-327 [Conf ] Andreas Döring Parallelism in a CRC Coprocessor. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:328-337 [Conf ] Tobias Schubert , Bernd Becker A Distributed SAT Solver for Microcontroller. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:338-347 [Conf ] Latifa Boursas , Jörg Keller Implementation and Evaluation of a Parallel-External Algorithm for Cycle Structure Computation on a PC-Cluster. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:348-357 [Conf ] Torsten Mehlan , Wolfgang Rehm VIA2SISCI - A New Library that Provides the VIA Semantics for SCI Connected Clusters. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:358-367 [Conf ] Henri E. Bal Ibis: a Java-centric Programming Environment for Computational Grids. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:368-369 [Conf ] Tianchao Li , Toni Bollinger Distributed and Parallel Data Mining on the Grid. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:370-379 [Conf ] Kai Trojahner , Peter Sobe File Sharing Using IP-Multicast. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:380-389 [Conf ] Carsten Albrecht , Rainer Hagenau , Erik Maehle , Andreas Döring , Andreas Herkersdorf A Comparison of Parallel Programming Models of Network Processors. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:390-399 [Conf ] Baiyi Song , Carsten Ernemann , Ramin Yahyapour Modelling of Parameters in Supercomputer Workloads. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:400-409 [Conf ] Jie Tao , Wolfgang Karl On the Cache Access Behavior of OpenMP Applications. [Citation Graph (0, 0)][DBLP ] ARCS Workshops, 2004, pp:410-419 [Conf ]