The SCEAS System
Navigation Menu

Conferences in DBLP

Parallel Computing in Electrical Engineering (parelec)
2000 (conf/parelec/2000)

  1. Ghassan Fadlallah, Michel Lavoie, Louis-A. Dessaint
    Parallel Computing Environments and Methods. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:2-7 [Conf]
  2. Dan Grigoras, Stefan Mihaila
    A Framework for Component-Based Distributed Applications Design the CODE: Component Oriented Distributed Environment. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:8-12 [Conf]
  3. Roger Hillson, Michal Iglewski
    C++2MPI: A Software Tool for Automatically Generating MPI Datatypes from C++ Classes. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:13-17 [Conf]
  4. Janusz Borkowski
    Towards More Powerful and Flexible Synchronization Primitives. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:18-23 [Conf]
  5. Anatoly Prihozhy, Redouane Merdjani, Fuad Iskandar
    Automatic Parallelization of Net Algorithms. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:24-28 [Conf]
  6. Anna Swiecicka, Franciszek Seredynski
    Cellular Automata Approach to Scheduling Problem. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:29-33 [Conf]
  7. Jiegao Wang, Clément Gosselin
    Parallel Computational Algorithms for the Simulation of Closed-Loop Robotic Systems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:34-38 [Conf]
  8. Andrzej Jordan, Przemyslaw Prokopow
    Concurrent Implementation of Linear and Nonlinear Programming. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:39-42 [Conf]
  9. Raymond Greenlaw, Charles Shipley, James Wogulis
    Fast Sequential and Parallel Algorithms for Label Selection to Obtain Space Efficient Implementations in a Software Configuration Management System. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:43-49 [Conf]
  10. Pawel Czarnul, Henryk Krawczyk
    Parallel Program Execution with Process Migration. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:50-54 [Conf]
  11. Mahmoud A. Manzoul
    Parallel CLA Algorithm for Fast Addition. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:55-58 [Conf]
  12. Jemal H. Abawajy
    An Approach to Support a Single Service Provider Address Image for Wide Area Networks Environment. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:59-63 [Conf]
  13. Abdellah Yousfi, Abdelouafi Meziane
    Introduction of the Speaking Rate in the Model of Speech Recognition. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:64-66 [Conf]
  14. Laurence Tianruo Yang
    Parallel Jacobi-Davidson Method for Multichannel Blind Equalization Criterium. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:67-73 [Conf]
  15. Marek Tudruj
    'Connection by Communication' Paradigm for Dynamically Reconfigurable Multi-Processor Systems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:74-78 [Conf]
  16. R. Hotchkiss, B. C. O'Neill, S. Clark
    Fault Tolerance for an Embedded Wormhole Switched Network. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:79-83 [Conf]
  17. Claude Daval-Frerot, Michel Lacroix, Hervé Guyennet
    Federation of Resource Traders in Objects-Oriented Distributed Systems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:84-88 [Conf]
  18. Renate Merker
    High-Level Synthesis System (HLDESA) for Processor Arrays. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:89-93 [Conf]
  19. Akiyoshi Wakatani
    A Scalable Parallel Algorithm for the Extraction of Active Contours. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:94-99 [Conf]
  20. Lev Kirischian
    Optimization of Parallel Task Execution on the Adaptive Reconfigurable Group Organized Computing System. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:100-105 [Conf]
  21. Eryk Laskowski
    Program Graph Scheduling in the Look-Ahead Reconfigurable Multiprocessor System. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:106-110 [Conf]
  22. Jemal H. Abawajy, Sivarama P. Dandamudi
    Distributed Hierarchical Workstation Cluster Co-Ordination Scheme. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:111-115 [Conf]
  23. Jemal H. Abawajy, Sivarama P. Dandamudi
    Time/Space Sharing Distributed Job Scheduling Policy in a Workstation Cluster Environment. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:116-120 [Conf]
  24. Kayo Suzuki, Mitsuru Nagao, Hiroaki Ikeda
    Reduction of Waiting Time in Retrieving Images Utilizing Image Directories with Sketched Image as Key. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:121-127 [Conf]
  25. Laurence Tianruo Yang
    Parallel Efficient Implementation of Hierarchical Algorithms for Module Placement of Large Chips. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:128-133 [Conf]
  26. Ziad H. Mussallam, Rana Ejaz Ahmed, Saleh A. Alshebeili
    A VLSI Systolic Array Architecture for Computation of Third-Order Cumulants for Two-Dimensional Signals. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:134-138 [Conf]
  27. Mathias Kortke, Thomas Schmitt, Renate Merker
    Application of Partitioning Methods for the Design of Parallel Programs for a System of Digital Signal Processors. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:139-143 [Conf]
  28. Anne-Claire Guillou, Patrice Quinton, Tanguy Risset, Daniel Massicotte
    Automatic Design of VLSI Pipelined LMS Architectures. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:144-149 [Conf]
  29. Lucas Szajek, Lev Kirischian
    Implementation of an Adaptive Reconfigurable Group Organized (ARGO) Parallel Architecture. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:150-154 [Conf]
  30. Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
    Optimal Partitioning for FPGA Based Regular Array Implementations. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:155-159 [Conf]
  31. Shaowen Song
    Multiprocessor Parallel Routing for the Quality of Service Enabled Internet. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:160-165 [Conf]
  32. Carsten Trinitis, Michael Eberl, Wolfgang Karl
    Numerical Calculation of Electromagnetic Problems on an SCI Based PC-Cluster. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:166-170 [Conf]
  33. Ryusuke Tsuji
    Parallel Computing for Tracing Torus Magnetic Field Line. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:171-175 [Conf]
  34. Jaroslaw Forenc, Adam Skorek
    Analysis of High Frequency Electromagnetic Wave Propagation Using Parallel MIMD Computer and Cluster System. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:176-180 [Conf]
  35. Emmanuel Cagniot, Jean-Luc Dekeyser, Pierre Boulet, Thomas Brandes, Francis Piriou, Georges Marques
    Parallelization of a 3D Magnetostatic Code Using High Performance Fortran. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:181-185 [Conf]
  36. Marco Cioffi, Alessandro Formisano, Raffaele Martone
    Distributed Niching Concept for Electromagnetic Shape Optimization by Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:186-191 [Conf]
  37. Jaroslaw Forenc, Andrzej Jordan, Marek Tudruj
    Speculative Parallel Processing Applied to Modeling of Initial Problems in Electrical Circuits. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:192-196 [Conf]
  38. Thierry Jacques, Laurent Nicolas, Christian Vollaire
    Parallelization of the Boundary Element Method for the Modeling of Large Electromagnetic Scattering Problems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:197-202 [Conf]
  39. Takeshi Iwashita, Takeshi Mifune, Ryo Sokabe, Masaaki Shimasaki
    Three-Dimensional Finite Brick-Type Edge-Element Eddy Current Analysis Using Parallelized Linear-System Solvers. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:203-207 [Conf]
  40. Wojciech Walendziuk
    Parallel Implementation of the Three-Dimensional Temperature Distribution Field in a Floor with Electrical Heating System. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:208-212 [Conf]
  41. A. S. Podgorski, Marek B. Zaremba, M. Vogel
    Parallel Computer Modeling of Complex Electromagnetic Systems. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:213-217 [Conf]
  42. Karol Bednarek, Ryszard Nawrowski, Andrzej Tomczewski
    An Application of Genetic Algorithm for Three Phases Screened Conductors Optimization. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:218-222 [Conf]
  43. José R. Martí, Jorge A. Hollman, Jesús Calviño-Fraga
    Implementation of a Real-Time Distributed Network Simulator with PC-Cluster. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:223-227 [Conf]
  44. Douglas Antony Louis Piriyakumar, Paul Levi, R. Jayaganthan, R. Sarathi
    A Parallel Processing Technique for Electrical Tree Growth in Solid Insulating Materials Using Cellular Automat. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:228-231 [Conf]
  45. Hamid Maçbahi, Abdellfattah Ba-Razzouk, Ahmed Chériti
    Decoupled Parallel Simulation of Power Electronics Systems Using Matlab-Simulink. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:232-236 [Conf]
  46. Mostafa Azizi, El Mostapha Aboulhamid, Sofiène Tahar
    Sequential and Distributed Simulations Using Java Threads. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:237-243 [Conf]
  47. Qusay H. Mahmoud
    Using Jini for High-Performance Network Computing. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:244-247 [Conf]
  48. Adam Smyk, Marek Tudruj
    Inter-Process Communication for Parallel Computations of Wavelet Transforms on Hitachi SR2201 Supercomputer. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:248-252 [Conf]
  49. A. El Adnani, A. Ait Ouahman, Horst D. Clausen
    IP/ATM Solution for Accelerating Internet Services. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:253-256 [Conf]
  50. Henryk Krawczyk, Rafal Knopa, Katarzyna Lipczynska, Maciej Lipczynski
    Web-Based Endoscopy Recommender System - ERS. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2000, pp:257-261 [Conf]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002