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Conferences in DBLP

Architektur von Rechensystemen (arcs)
1988 (conf/arcs/1988)

  1. Hans P. Zima
    Das SUPRENUM-System: Architektur, Software und Anwendungen (eingeladener Vortrag). [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:1-20 [Conf]
  2. Markus Caspar
    Parallele Ausführung sequentieller Programme auf Multiple Processing Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:21-33 [Conf]
  3. Hermann Mierendorff
    Optimizing the Peak-Performance of Vector Units with Dynamically Allocatable Vector Registers. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:34-46 [Conf]
  4. Eckehart Hotzel
    Connection Structures - a Component of Parallel Programming Languages. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:47-63 [Conf]
  5. Otto Kolp
    A Multigrid Algorithm on Hypercube Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:64-69 [Conf]
  6. Claudio Moraga
    A Systolic Algorithm for the Generalized Transitive Closure. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:70-79 [Conf]
  7. Rainer Oechsle
    Prozeßkommunikation mit asynchronem Empfangen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:80-93 [Conf]
  8. Heiko von Drachenfels
    Baumorientierte Kommuninkation in verteilten Systemen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:94-105 [Conf]
  9. Lothar Borrmann, Martin Herdieckerhoff
    Linda integriert in Modula-2 - ein Sprachkonzept für portable parallele Software. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:106-118 [Conf]
  10. Susan L. Graham
    Code Generation and RISC Architectures (eingeladener Vortrag). [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:119-131 [Conf]
  11. Christian Müller-Schloer, Thomas Niedermeier, Doris Rauh
    Colibri: Ein Testfall für die RISC-Philosophie. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:132-141 [Conf]
  12. Christoph Legutko, Eberhard Schäfer, Jürgen Tappe
    Die Befehlspipeline des COLIBRI-Systems. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:142-151 [Conf]
  13. Arnd Poetzsch-Heffter
    Reorganisieren von Basisblöcken für Pipeline-Prozessoren. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:152-167 [Conf]
  14. Thomas Bergstraesser, Jürgen Gessner, Karlheinz Hafner, Stefan Wallstab
    Eine flexible Entwurfsumgebung für RISC-änliche Prozessorarchitekturen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:168-177 [Conf]
  15. Klaus J. Berkling
    System Architectures for Functional Programming Languages: Problems and Solutions(eingeladener Vortrag). [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:178-197 [Conf]
  16. Martin Raber, Thomas Remmel, Erwin Hoffmann, Dieter Maurer, Fritz Müller, Hans-Georg Oberhauser, Reinhard Wilhelm
    Complied Graph Reduction on a Processor Network. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:198-212 [Conf]
  17. Johannes Engels
    An Or-Parallel Logic Programming Machine for Non-shared Memory Architectures. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:213-232 [Conf]
  18. Djamshid Tavangarian
    Konzept eines flagorientierten vollparallelen Assoziativprozessors auf der Basis der Flagalgebra. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:233-249 [Conf]
  19. Jürgen Kreyßig, Horst Schukat, Hans Christoph Zeidler
    Transaktionsorientierte Datenverwaltung in einem intelligenten Disk Controller. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:250-267 [Conf]
  20. Klaus-Dieter Lewke
    Überlegungen zu einer Hardware-Architektur zur schnellen Analyse von Programmiersprachen. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:268-276 [Conf]
  21. Felix Fehlau, Michael Rupprecht
    Alternative Recherarchitektur für Datenübertragungs-Controller mit hohen Datenraten. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:277-289 [Conf]
  22. Udo Dierk
    Rechnernetze - Realisierung, Standardisierung, weitere Entwicklung (eingeladener Vortrag). [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:290-306 [Conf]
  23. Dieter Haban, Dieter Wybranietz
    A Tool for measuring and Monitoring Distributed Systems During Operation. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:307-323 [Conf]
  24. Maria Calzarossa, Günter Haring, Giuseppe Serazzi
    Workload Modeling for Computer Networks. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:324-339 [Conf]
  25. Walter Gora, R. Speyerer
    Automatische Codegenerierung für Protokolle in der ISO-Syntax ASN.1. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:340-356 [Conf]
  26. Edward M. McCreight
    Microprocessor Features a la Carte (eingeladener Vortrag). [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:357-367 [Conf]
  27. Reinhard Reisig
    Validation in Top Down Design Including Test Pattern Generation. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:368-380 [Conf]
  28. Lothar Nowak
    SAMP: A General Purpose Processor Based on a Self-Timed VLIW Structure. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:381-390 [Conf]
  29. Jürgen Hülsemann
    Gezielte Erzeugung von Zugriffskonflikten zu Testzwecken. [Citation Graph (0, 0)][DBLP]
    ARCS, 1988, pp:391-405 [Conf]
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