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Conferences in DBLP

IEEE Symposium on Computer Arithmetic (arith)
1997 (conf/arith/1997)

  1. Eric M. Schwarz, Robert M. Averill III, Leon J. Sigal
    A Radix-8 CMOS S/390 Multiplier. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:2-9 [Conf]
  2. Andrew Beaumont-Smith, Neil Burgess
    A GaAs 32-bit Adder. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:10-17 [Conf]
  3. David L. Harris, Stuart F. Oberman, Mark Horowitz
    SRT Division Architectures and Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:18-25 [Conf]
  4. Thomas K. Callaway, Earl E. Swartzlander Jr.
    Power-Delay Characteristics of CMOS Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:26-0 [Conf]
  5. Asger Munk Nielsen, Peter Kornerup
    On Radix Representation of Rings. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:34-43 [Conf]
  6. Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
    Theory and applications for a double-base number system. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:44-0 [Conf]
  7. Guy Even, Wolfgang J. Paul
    On the Design of IEEE Compliant Floating Point Units. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:54-63 [Conf]
  8. Walter Krämer
    A Priori Worst-Case Error Bounds for Floating-Point Computations. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:64-0 [Conf]
  9. Eric Rice, Richard Hughey
    Multiprecision Division on an 8-bit Processor. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:74-81 [Conf]
  10. Debjit Das Sarma, David W. Matula
    Faithful Interpolation in Reciprocal Tables. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:82-91 [Conf]
  11. Colin D. Walter
    Exponentiation using Division Chains. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:92-97 [Conf]
  12. Paul F. Stelling, Vojin G. Oklobdzija
    Implementing Multiply-Accumulate Operation in Multiplication Time. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:99-0 [Conf]
  13. Tomás Lang, Elisardo Antelo
    CORDIC Vectoring with Arbitrary Target Value. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:108-115 [Conf]
  14. Gerben J. Hekstra, Ed F. Deprettere
    Fast Rotations: Low-cost Arithmetic Methods for Orthonormal Rotation. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:116-125 [Conf]
  15. Naofumi Takagi
    Generating a Power of an Operand by a Table Look-up and a Multiplication. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:126-131 [Conf]
  16. Vincent Lefèvre, Arnaud Tisserand, Jean-Michel Muller
    Towards Correctly Rounded Transcendentals. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:132-0 [Conf]
  17. David W. Matula, Asger Munk Nielsen
    Pipelined Packet-Forwarding Floating Point: I. Foundations and a Rounder. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:140-147 [Conf]
  18. Asger Munk Nielsen, David W. Matula, Chung Nan Lyu, Guy Even
    Pipelined Packet-Forwarding Floating Point: II. An Adder. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:148-155 [Conf]
  19. Stuart F. Oberman, Hesham A. Al-Twaijry, Michael J. Flynn
    The SNAP Project: Design of Floating Point Arithmetic Unit. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:156-0 [Conf]
  20. Douglas M. Priest
    Fast Table-Driven Algorithms for Interval Elementary Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:168-174 [Conf]
  21. Michael J. Schulte, James E. Stine
    Symmetric Bipartite Tables for Accurate Function Approximation. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:175-183 [Conf]
  22. Jun Cao, Belle W. Y. Wei
    High-Performance Hardware for Function Generation. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:184-0 [Conf]
  23. Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Mark D. Winkel
    Arithmetic Co-transformations in the Real and Complex Logarithmic Number Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:190-199 [Conf]
  24. Takafumi Aoki, Hiroaki Amada, Tatsuo Higuchi
    Real/Complex Reconfigurable Arithmetic Using Redundant Complex Number Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:200-207 [Conf]
  25. Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
    Algorithms for Multi-Exponentiation Based on Complex Arithmetic. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:208-0 [Conf]
  26. Peter R. Turner
    Fraction-Free RNS Algorithms for Solving Linear Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:218-217 [Conf]
  27. Çetin Kaya Koç, Tolga Acar
    Fast Software Exponentiation in GF(2^k). [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:225-0 [Conf]
  28. Jean-Claude Bajard, Laurent-Stéphane Didier, Peter Kornerup
    An IWS Montgomery Modular Multiplication Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:234-239 [Conf]
  29. Ahmad A. Hiasat, Hoda S. Abdel-Aty-Zohdy
    Design and Implementation of An RNS Division Algorithmm. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:240-249 [Conf]
  30. Neil Burgess
    Scaled and Unscaled Residue Number System to Binary Conversion Techniques using the Core Function. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:250-0 [Conf]
  31. Christiane Frougny
    On-the-Fly Algorithms and Sequential Machines. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:260-265 [Conf]
  32. David R. Lutz, D. N. Jayasimha
    The Half-Adder Form and Early Branch Condition Resolution. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:266-273 [Conf]
  33. Mircea R. Stan
    Synchronous Up/Down Counter with Clock Period Independent of Counter Size. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:274-281 [Conf]
  34. Gianluca Cena, Paolo Montuschi, Luigi Ciminiera, Andrea Sanna
    A Q-Coder Algorithm with Carry Free Addition. [Citation Graph (0, 0)][DBLP]
    IEEE Symposium on Computer Arithmetic, 1997, pp:282-0 [Conf]
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