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Conferences in DBLP

Asia-Pacific Computer Systems Architecture Conference (ACSAC) (aPcsac)
2004 (conf/aPcsac/2004)

  1. James E. Smith
    Some Real Observations on Virtual Machines. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:1- [Conf]
  2. Wei Zhang 0002
    Replica Victim Caching to Improve Reliability of In-Cache Replication. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:2-15 [Conf]
  3. Chunrong Lai, Shih-Lien Lu
    Efficient Victim Mechanism on Sector Cache Organization. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:16-29 [Conf]
  4. Xingyan Tian, Kejia Zhao, Huowang Chen, Hongyan Du
    Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:30-43 [Conf]
  5. Diego Andrade, Basilio B. Fraguela, Ramon Doallo
    Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:44-57 [Conf]
  6. Sebastian Wallner
    A Configurable System-on-Chip Architecture for Embedded Devices. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:58-71 [Conf]
  7. Nicolas Ventroux, Stéphane Chevobbe, Frédéric Blanc, Thierry Collette
    An Auto-adaptative Reconfigurable Architecture for the Control. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:72-87 [Conf]
  8. Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan
    Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:88-101 [Conf]
  9. Seong-Yong Ahn, Jun-Yong Kim, Jeong-A. Lee
    Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:102-114 [Conf]
  10. Jian Chen, Ruhao Xu, Yuzhuo Fu
    Architecture Design of a High-Performance 32-Bit Fixed-Point DSP. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:115-125 [Conf]
  11. Lei Wang, Hongyi Lu, Kui Dai, Zhiying Wang
    TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:126-136 [Conf]
  12. Wenbin Yao, Dongsheng Wang, Weimin Zheng
    A Fault-Tolerant Single-Chip Multiprocessor. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:137-145 [Conf]
  13. Philip Machanick
    Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:146-159 [Conf]
  14. Kui-Yon Mun, Dae Woong Kim, Do-Hun Kim, Chan-Ik Park
    dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:160-169 [Conf]
  15. Byung-Soo Choi, Jeong-A. Lee, Dong-Soo Har
    High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:170-184 [Conf]
  16. Marc Epalza, Paolo Ienne, Daniel Mlynek
    Dynamic Reallocation of Functional Units in Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:185-198 [Conf]
  17. Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang
    Multiple-Dimension Scalable Adaptive Stream Architecture. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:199-211 [Conf]
  18. Kentaro Hamayasu, Vasily G. Moshnyaga
    Impact of Register-Cache Bandwidth Variation on Processor Performance. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:212-225 [Conf]
  19. Youfeng Wu, Yong-Fong Lee
    Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:226-240 [Conf]
  20. Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew
    Continuous Adaptive Object-Code Re-optimization Framework. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:241-255 [Conf]
  21. Kevin Elphinstone, Stefan Götz
    Initial Evaluation of a User-Level Device Driver Framework. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:256-269 [Conf]
  22. Jesse Zhixi Fang
    A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To? [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:270- [Conf]
  23. Byung-Uck Kim, Woo-Chan Park, Sung-Bong Yang, Tack-Don Han
    A Cost-Effective Supersampling for Full Scene AntiAliasing. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:271-281 [Conf]
  24. Stefan Tillich, Johann Großschädl
    A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2m). [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:282-295 [Conf]
  25. Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Scalable Design Framework for JPEG2000 System Architecture. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:296-308 [Conf]
  26. JongSu Yi, JunSeong Kim, LiPing Li, John Morris, Gareth Lee, Philippe Leclercq
    Real-Time Three Dimensional Vision. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:309-320 [Conf]
  27. Madhusudhanan Anantha, Bella Bose
    A Router Architecture for QoS Capable Clusters. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:321-334 [Conf]
  28. Zhenghao Zhang, Yuanyuan Yang
    Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:335-348 [Conf]
  29. Hashem Hashemi Najaf-abadi, Hamid Sarbazi-Azad
    Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:349-362 [Conf]
  30. Kyoung-Sun Jhang, Kang Yi, Soo Yun Hwang
    A Two-Level On-Chip Bus System Based on Multiplexers. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:363-372 [Conf]
  31. Guojie Li
    Make Computers Cheaper and Simpler. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:373- [Conf]
  32. Sung Woo Chung, Sung-Bae Park
    A Low Power Branch Predictor to Selectively Access the BTB. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:374-384 [Conf]
  33. Weidong Shi, Tao Zhang, Santosh Pande
    Static Techniques to Improve Power Efficiency of Branch Predictors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:385-398 [Conf]
  34. Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee
    Choice Predictor for Free. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:399-413 [Conf]
  35. Yong Xiao, Kun Deng, Xingming Zhou
    Performance Impact of Different Data Value Predictors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:414-425 [Conf]
  36. SunHo Baek, KyuHo Lee, JunSeong Kim, John Morris
    Heterogeneous Networks of Workstations. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:426-439 [Conf]
  37. Wu Jigang, Thambipillai Srikanthan
    Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:440-448 [Conf]
  38. Woo-Chan Park, Tack-Don Han, Sung-Bong Yang
    Order Independent Transparency for Image Composition Parallel Rendering Machines. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:449-460 [Conf]
  39. Changqin Huang, Guanghua Song, Yao Zheng, Deren Chen
    An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:461-472 [Conf]
  40. Ruby B. Lee, Xiao Yang, Zhijie Shi
    Validating Word-Oriented Processors for Bit and Multi-word Operations. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:473-488 [Conf]
  41. Tzung-Rei Yang, Jong-Jiann Shieh
    Dynamic Fetch Engine for Simultaneous Multithreaded Processors. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:489-502 [Conf]
  42. Zhenyu Liu, Jiayue Qi
    A Novel Rename Register Architecture and Performance Analysis. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:503-514 [Conf]
  43. Rui-fang Liu, Change-sheng Xie, Zhi-hu Tan, Qing Yang
    A New Hierarchy Cache Scheme Using RAM and Pagefile. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:515-526 [Conf]
  44. Youhui Zhang, Weimin Zheng
    An Object-Oriented Data Storage System on Network-Attached Object Devices. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:527-538 [Conf]
  45. Kiyofumi Tanaka, Toshihide Hagiwara
    A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:539-553 [Conf]
  46. Xiaobin Li, Jean-Luc Gaudiot
    A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:554-567 [Conf]
  47. Woo-Chan Park, Tack-Don Han, Sung-Bong Yang
    A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:568-581 [Conf]
  48. Jeong-Gun Lee, Euiseok Kim, Jeong-A. Lee, Eunok Paek
    Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. [Citation Graph (0, 0)][DBLP]
    Asia-Pacific Computer Systems Architecture Conference, 2004, pp:582-595 [Conf]
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NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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