Conferences in DBLP
Charles L. Seitz Silicon Adventures-Go Ahead; Be Bold! [Citation Graph (0, 0)][DBLP ] Conf ] Bruce R. Childers , Jack W. Davidson Architectural Considerations for Application-Specific Counterflow Pipelines. [Citation Graph (0, 0)][DBLP ] Conf ] Darren C. Cronquist , Chris Fisher , Miguel Figueroa , Paul Franklin , Carl Ebeling Architecture Design of Reconfigurable Pipelined Datapaths. [Citation Graph (0, 0)][DBLP ] Conf ] Tonia Morris , Erica Fletcher , Cyrus Afghahi , Sami Issa , Kevin Connolly , Jean-Charles Korta A Column-based Processing Array for High-speed Digital Image Processing. [Citation Graph (0, 0)][DBLP ] Conf ] Sek M. Chai , Antonio Gentile , D. Scott Wills Impact of Power Density Limitation in Gigascale Integration for the SIMD Pixel Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Kwabena Boahen A Throughput-On-Demand Address-Event Transmitter for Neuromorphic Chips. [Citation Graph (0, 0)][DBLP ] Conf ] James D. Meindl XXI Century Gigascale Integration (GSI) : The Interconnect Problem. [Citation Graph (0, 0)][DBLP ] Conf ] Sandeep N. Bhatt , Gianfranco Bilardi , Geppino Pucci Area-Universal Circuits with Constant Slowdown. [Citation Graph (0, 0)][DBLP ] Conf ] Spencer M. Gold , Richard B. Brown , Bruce Bernhardt A Quantitative Approach to Nonlinear Process Design Rule Scaling. [Citation Graph (0, 0)][DBLP ] Conf ] P. Ghosh , R. Mangaser , C. Mark , K. Rose Interconnect-Dominated VLSI Design. [Citation Graph (0, 0)][DBLP ] Conf ] Li-Rong Zheng , Hannu Tenhunen Noise Margin Constraints for Interconnectivity in Deep Submicron Low Power and Mixed-Signal VLSI Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Nestoras Tzartzanis , William C. Athas Clock-Powered CMOS: A Hybrid Adiabatic Logic Style for Energy-Efficient Computing. [Citation Graph (0, 0)][DBLP ] Conf ] Robert W. Brodersen System-on-a-Chip VLSI - Is It Finally Really Here? [Citation Graph (0, 0)][DBLP ] Conf ] Ching-Wei Yeh , Min-Cheng Chang , Yin-Shuin Kang Algorithms Promoting the Use of Dual Supply Voltages for Power-Driven Designs. [Citation Graph (0, 0)][DBLP ] Conf ] Vijay Sundararajan , Keshab K. Parhi Low Power Gate Resizing of Combinational Circuits by Buffer-Redistribution. [Citation Graph (0, 0)][DBLP ] Conf ] Bradley A. Minch Translinear Analog Signal Processing: A Modular Approach to Large-Scale Analog Computation with Multiple-Input Translinear Elements. [Citation Graph (0, 0)][DBLP ] Conf ] Ayoob E. Dooply , Kenneth Y. Yun Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines. [Citation Graph (0, 0)][DBLP ] Conf ] Paul E. Hasler , Bradley A. Minch , Chris Diorio Adaptive Circuits Using pFET Floating-Gate Devices. [Citation Graph (0, 0)][DBLP ] Conf ] William J. Dally , Steve Lacy VLSI Architecture: Past, Present, and Future. [Citation Graph (0, 0)][DBLP ] Conf ] Lucian Codrescu , Mondira Deb Pant , Tarek M. Taha , John Eble , D. Scott Wills , James D. Meindl Exploring Microprocessor Architectures for Gigascale Integration. [Citation Graph (0, 0)][DBLP ] Conf ] Dana S. Henry , Bradley C. Kuszmaul , Vinod Viswanath The Ultrascalar Processor-An Asymptotically Scalable Superscalar Microarchitecture. [Citation Graph (0, 0)][DBLP ] Conf ] Timothy Horiuchi , Ernst Niebur Conjunction Search Using a 1-D, Analog VLSI-based, Attentional Search/Tracking Chip. [Citation Graph (0, 0)][DBLP ] Conf ] Charles S. Wilson , Tonia G. Morris , Stephen P. DeWeerth A Two-Dimensional, Object-Based Analog VLSI Visual Attention System. [Citation Graph (0, 0)][DBLP ] Conf ] Charles M. Higgins , Christof Koch Multi-Chip Neuromorphic Motion Processing. [Citation Graph (0, 0)][DBLP ] Conf ] John Poulton Problems and Prospects for Electrical Signaling. [Citation Graph (0, 0)][DBLP ] Conf ] Sudip Chakrabarti , Abhijit Chatterjee Compact Fault Dictionary Construction for Efficient Isolation of Faults in Analog and Mixed-Signal Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Ramakrishna Voorakaranam , Abhijit Chatterjee Feedback Driven Backtrace of Analog Signals and its Application to Circuit Verification and Test. [Citation Graph (0, 0)][DBLP ] Conf ] Neil Weste Who Put the Sugar in Sydney Harbor?. [Citation Graph (0, 0)][DBLP ] Conf ] Charles L. Britton Jr. , R. J. Warmack , S. F. Smith , A. L. Wintenberg , T. Thundat , G. M. Brown , W. L. Bryan , J. C. Depriest , M. N. Ericson , M. S. Emery , M. R. Moore , G. W. Turner , L. G. Clonts , R. L. Jones , T. D. Threatt , Z. Hu , James M. Rochelle Battery-powered, Wireless MEMS Sensors for High-Sensitivity Chemical and Biological Sensing. [Citation Graph (0, 0)][DBLP ] Conf ] B. E. Duewer , J. M. Wilson , D. A. Winick , Paul D. Franzon MEMS-Based Capacitor Arrays for Programmable Interconnect and RF Applications. [Citation Graph (0, 0)][DBLP ] Conf ] 