Conferences in DBLP
Marco Pavesi Market Estimation for System Prototyping EDA Segment. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:2-0 [Conf ] Akira Kitajima , Toshiyuki Sasaki , Yoshinori Takeuchi , Masaharu Imai Design of Application Specific CISC Using PEAS-III. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:12-17 [Conf ] Chun Hok Ho , M. P. Leong , Philip Heng Wai Leong , Jürgen Becker , Manfred Glesner Rapid Prototyping of FPGA Based Floating Point DSP Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:19-24 [Conf ] Santiago Sánchez-Solano , Raouf Senhadji Navarro , Alejandro Cabrera Sarmiento , Iluminada Baturone , C. J. Jiménez , Angel Barriga Barrios Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:25-0 [Conf ] Matías J. Garrido , César Sanz , Marcos Jiménez , Juan M. Meneses A Flexible H.263 Video Coder Prototype Based on FPGA. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:34-41 [Conf ] Abdulfattah Mohammad Obeid , Alberto García Ortiz , Ralf Ludewig , Manfred Glesner Prototyping of a High Performance Generic Viterbi Decoder. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:42-47 [Conf ] Thilo Pionteck , N. Toender , Lukusa D. Kabulepa , Manfred Glesner , T. Kella On the Rapid Prototyping of Equalizers for OFDM Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:48-52 [Conf ] Eric Borghs , Jeroen Jacobs , Michaël Beck , Adrian Mihanta , Piet Vandaele , Thierry Pollet Prototyping Ethernet in the First Mile over Point-to-Point Copper. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:53-0 [Conf ] Javier Martín-Langerwerf , Carsten Reuter , Holger Kropp , Peter Pirsch Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:60-65 [Conf ] Sushil Chandra Jain , Anshul Kumar , Shashi Kumar Hybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:66-0 [Conf ] M. Guler , S. Clements , N. Kejriwal , L. Wills , B. Heck , George J. Vachtsevanos Rapid Prototyping of Transition Management Code for Reconfigurable Control Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:76-83 [Conf ] Christian Hinkelbein , Andreas Kugel , Reinhard Männer , Matthias Müller Reconfigurable Hardware Control Software. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:84-91 [Conf ] Stanislav Chachkov , Didier Buchs Interfacing Software Libraries from Non-deterministic Prototypes. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:92-98 [Conf ] Guoqiang Shu , Chao Li , Qing Wang , Mingshu Li Validating Objected-Oriented Prototype of Real-Time Systems with Timed Automata. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:99-0 [Conf ] Markus Kühl , Clemens Reichmann , I. Prötel , Klaus D. Müller-Glaser From Object-Oriented Modeling to Code Generation for Rapid Prototyping of Embedded Electronic Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:108-114 [Conf ] Klaus Buchenrieder , Ulrich Nageldinger , Andreas Pyttel , Alexander Sedlmeier System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System Model. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:115-121 [Conf ] Hideaki Yanagisawa , Minoru Uehara , Hideki Mori ISA Based System Design Language in HW/SW Co-Design Environment. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:122-0 [Conf ] Mário P. Véstias , Horácio C. Neto System-Level Co-Synthesis of Dataflow Dominated Applications on Reconfigurable Hardware/Software Architectures. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:130-137 [Conf ] Ralf Ludewig , Alberto García Ortiz , Tudor Murgan , Manfred Glesner Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:138-0 [Conf ] Frank Golatowski , Jens Hildebrandt , Jan Blumenthal , Dirk Timmermann Framework for Validation, Test and Analysis of Real-Time Scheduling Algorithms and Scheduler Implementations. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:146-152 [Conf ] Christophe Bobda , Nils Steenbock A Rapid Prototyping Environment for Distributed Reconfigurable Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:153-158 [Conf ] Natalino G. Busá , Ghiath Alkadi , Michael Verberne , Rafael Peset Llopis , Sethuraman Ramanatha RAPIDO: A Modular, Multi-Board, Heterogeneous Multi-Processor, PCI Bus Based Prototyping Framework for the Validation of SoC VLSI Designs. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:159-165 [Conf ] Maryse Wouters , Tom Huybrechts , Roeland Huys , Stefaan De Rore , Steven Sanders , Erik Uman PICARD: Platform Concepts for Prototyping and Demonstration of High Speed Communication Systems. [Citation Graph (0, 0)][DBLP ] IEEE International Workshop on Rapid System Prototyping, 2002, pp:166-0 [Conf ]