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Conferences in DBLP

IEEE International Workshop on Rapid System Prototyping (rsp)
2003 (conf/rsp/2003)

  1. Apostolos Dollas, Dionissios Efstathiou, Thomas Kyriakides
    A Universal Low Cost Run-Time and Programming Environment for Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:2-8 [Conf]
  2. Patrick Tessier, Sébastien Gérard, Chokri Mraidha, Jean-Marc Geib
    A Component-Based Methodology for Embedded System Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:9-15 [Conf]
  3. Sami J. Habib, Alice C. Parker
    i-CAD: A Rapid Prototyping CAD Tool for Intranet Design. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:16-0 [Conf]
  4. Stefan Förster, M. Fischer, André Windisch, B. Balser, D. Monjau
    A New Specification Methodology for Embedded Systems Based on the - Calculus Process Algebra. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:26-32 [Conf]
  5. Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya
    Embedded Application Prototyping on a Communication-Restricted Reconfigurable. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:33-39 [Conf]
  6. Nikolaus E. Kerö, Thilo Sauter
    Efficient Analysis of Mixed-Signal ASICs for Smart Sensors. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:40-46 [Conf]
  7. Doron Drusinsky, Man-tak Shing
    Verification of Timing Properties in Rapid System Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:47-0 [Conf]
  8. Ludovic Tambour, Nacer-Eddine Zergainoh, Pascal Urard, Henri Michel, Ahmed Amine Jerraya
    An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:56-63 [Conf]
  9. Abhijit K. Deb, Johnny Öberg, Axel Jantsch
    Simulation and Analysis of Embedded DSP Systems Using Petri Nets. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:64-70 [Conf]
  10. Achim Rettberg, Mauro Cesar Zanella, Thomas Lehmann, Christophe Bobda
    A New Approach of a Self-Timed Bit-Serial Synchronous Pipeline Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:71-77 [Conf]
  11. Gabor Hahn, Jan Philipps, Alexander Pretschner, Thomas Stauner
    Prototype-Based Tests for Hybrid Reactive Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:78-0 [Conf]
  12. Vincenza Carchiolo, Michele Malgeri, Giuseppe Mangioni
    Synthesis of LOTOS Specification of the IEEE-1394 Firewire Protocol. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:86-92 [Conf]
  13. Vincent Bassano, Gilles Bernot
    Marked Regulatory Graphs: A Formal Framework to Simulate Biological Regulatory Networks with Simple Automata. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:93-99 [Conf]
  14. Gordana Milosavljevic, Branko Perisic
    Really Rapid Prototyping of Large-Scale Business Information Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:100-0 [Conf]
  15. Paul Young, Nabendu Chaki, Valdis Berzins, Luqi
    Evaluation of Middleware Architectures in Achieving System Interoperability. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:108-116 [Conf]
  16. Ryan J. Fong, Scott J. Harper, Peter M. Athanas
    A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:117-123 [Conf]
  17. Jérôme Hugues, Laurent Pautet, Fabrice Kordon
    Contributions to middleware architectures to prototype distribution infrastructures. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:124-0 [Conf]
  18. Sanat Kamal Bahl
    Design and Prototyping a Fast Hadamard Transformer for WCDMA. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:134-140 [Conf]
  19. Thilo Pionteck, A. Garcya, Lukusa D. Kabulepa, Manfred Glesner
    The requirement for flexibility in IP-based designs increasesHardware Evaluation of Low Power Communication Mechanisms for Transport-Triggered Architectures. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:141-147 [Conf]
  20. Chen Chang, Kimmo Kuusilinna, Brian C. Richards, Allen Chen, Nathan Chan, Robert W. Brodersen, Borivoje Nikolic
    Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:148-0 [Conf]
  21. Tarek M. Taha, D. Scott Wills
    An Instruction Throughput Model of Superscalar Processors. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:156-163 [Conf]
  22. Chuanjun Zhang, Frank Vahid
    Cache Configuration Exploration on Prototyping Platforms. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:164-0 [Conf]
  23. Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Juan Jesus, Ocampo Hidalgo, Manfred Glesner
    Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:172-178 [Conf]
  24. Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cavallaro
    Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:179-185 [Conf]
  25. Stefan Ihmor, N. Bastos Jr., R. Cardoso Klein, Markus Visarius, Wolfram Hardt
    Rapid Prototyping of Real-Time Communication---A Case Study: Interacting Robots. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:186-0 [Conf]
  26. Nikolaos Papandreou, Maria Varsamou, Theodore Antonakopoulos
    xDSL Systems Prototyping using a Flexible Emulation Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:194-200 [Conf]
  27. Ángel Herranz-Nieva, Juan José Moreno-Navarro
    Rapid Prototyping and Incremental Evolution Using SLAM. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:201-0 [Conf]
  28. Luqi, Man-tak Shing, Joseph Puett, Valdis Berzins, Zhiwei Guan, Ying Qiao, Lynn Zhang, Nabendu Chaki, Xianzhong Liang, Bill Ray, Michael Brown, David L. Floodeen
    Comparative Rapid Prototyping, A Case Study. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:210-217 [Conf]
  29. Xianzhong Liang, Joseph Puett, Luqi
    Synthesizing Approach for Perspective-Based Architecture Design. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:218-225 [Conf]
  30. Prabhat Mishra, Arun Kejariwal, Nikil Dutt
    Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:226-232 [Conf]
  31. Shaoxiong Hua, Gang Qu, Shuvra S. Bhattacharyya
    Exploring the Probabilistic Design Space of Multimedia Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2003, pp:233-0 [Conf]
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NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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