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Conferences in DBLP

IEEE International Workshop on Rapid System Prototyping (rsp)
2006 (conf/rsp/2006)


  1. Message from the General Chairs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:- [Conf]

  2. Message from the Organizing Chair. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:- [Conf]

  3. Conference Committees. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:- [Conf]

  4. Message from the Program Chairs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:- [Conf]

  5. Acknowledgments. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:- [Conf]
  6. Philipp Graf, Klaus D. Müller-Glaser
    Dynamic Mapping of Runtime Information Models for Debugging Embedded Software. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:3-9 [Conf]
  7. Luis Pedro, Levi Lucio, Didier Buchs
    Principles for System Prototype and Verification Using Metamodel Based Transformations. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:10-17 [Conf]
  8. Doron Drusinsky, Man-tak Shing, Kadir Alpaslan Demir
    Creation and Validation of Embedded Assertion Statecharts. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:17-23 [Conf]
  9. Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flávio Rech Wagner
    Early Embedded Software Design Space Exploration Using UML-Based Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:24-32 [Conf]
  10. Ming Yang, Nikolaos G. Bourbakis
    A Prototyping Tool for Analysis and Modeling of Video Transmission Traces over IP Networks. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:33-39 [Conf]
  11. Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrishnan, Anshul Kumar
    Rapid Resource-Constrained Hardware Performance Estimation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:40-46 [Conf]
  12. Smaïl Niar, Nicolas Inglart
    Rapid Performance and Power Consumption Estimation Methods for Embedded System Design. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:47-53 [Conf]
  13. Christoforos Kachris, Stamatis Vassiliadis
    Performance Evaluation of an Adaptive FPGA for Network Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:54-62 [Conf]
  14. Sanggyu Park, Sang-yong Yoon, Soo-Ik Chae
    A Mixed-Level Virtual Prototyping Environment for Refinement-Based Design Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:63-68 [Conf]
  15. Benaoumeur Senouci, Aimen Bouchhima, Frédéric Rousseau, Frédéric Pétrot, Ahmed Amine Jerraya
    Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach". [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:69-75 [Conf]
  16. P. J. Lobo, M. A. Freire, M. J. Garrido, C. Sanz, F. Pescador, D. Samper
    The Prototyping Methodology of a Data Receiver for Digital Audio Broadcasting (DAB) Networks. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:76-81 [Conf]
  17. Thinh M. Le, X. H. Tian, B. L. Ho, J. Nankoo, Y. Lian
    System-on-Chip Design Methodology for a Statistical Coder. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:82-90 [Conf]
  18. Michel Metzger, Frederic Bastien, F. Rousseau, Julie Vachon, El Mostapha Aboulhamid
    Introspection Mechanisms for Semi-Formal Verification in a System-Level Design Environment. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:91-97 [Conf]
  19. Katell Morin-Allory, Laurent Fesquet, Dominique Borrione
    Asynchronous Assertion Monitors for multi-Clock Domain System Verification. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:98-102 [Conf]
  20. Cécile Braunstein, Emmanuelle Encrenaz
    Formalizing the Incremental Design and Verification Process of a Pipelined Protocol Converter. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:103-109 [Conf]
  21. Anupam Chattopadhyay, Arnab Sinha, Diandian Zhang, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
    Integrated Verification Approach during ADL-Driven Processor Design. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:110-118 [Conf]
  22. Daniel Cheung, Jean-Yves Tigli, Stephane Lavirotte, Michel Riveill
    Wcomp: a Multi-Design Approach for Prototyping Applications using Heterogeneous Resources. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:119-125 [Conf]
  23. Tianzhou Chen, Yin Yan, Hongjun Dai, Hu Wei
    An Agile BSP Modeling Methodology: Cross Platform BSP Framework (CPBF). [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:126-132 [Conf]
  24. Isabelle Hurbain, Corinne Ancourt, François Irigoin, Michel Barreteau, Nicolas Museux, Frederic Pasquier
    A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:133-139 [Conf]
  25. Ang Chen, Didier Buchs
    Generative Business Process Prototyping Framework. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:140-148 [Conf]
  26. Graham Mathias, Kenneth B. Kent
    An Embedded Java Virtual Machine Using Network-on-Chip Design. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:149-155 [Conf]
  27. Lobna Kriaa, Aimen Bouchhima, Wassim Youssef, Frédéric Pétrot, Anne-Marie Fouillart, Ahmed Amine Jerraya
    Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:156-162 [Conf]
  28. Melissa Vetromille, Luciano Ost, César A. M. Marcon, Carlos Eduardo Reif, Fabiano Hessel
    RTOS Scheduler Implementation in Hardware and Software for Real Time Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:163-168 [Conf]
  29. Bruno Girodias, Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha Aboulhamid, Pierre G. Paulin, Bruno Lavigueur
    Application-Level Memory Optimization for MPSoC. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:169-178 [Conf]
  30. Rawat Siripokarpirom
    Platform Development for Run-Time Reconfigurable Co-Emulation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:179-185 [Conf]
  31. Luiza Gheorghe, Faouzi Bouchhima, Gabriela Nicolescu, Hanifa Boucheneb
    Formal Definitions of Simulation Interfaces in a Continuous/Discrete Co-Simulation Tool. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:186-192 [Conf]
  32. Carsten Bieser, Klaus D. Müller-Glaser
    Rapid Prototyping Design Acceleration Using a Novel Merging Methodology for Partial Configuration Streams of Xilinx Virtex-II FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:193-199 [Conf]
  33. Eftichios Koutroulis, Kostas Kalaitzakis, Vasileios Tzitzilonis
    Development of an FPGA-based System for Real-Time Simulation of. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:200-208 [Conf]
  34. Kenneth B. Kent, Ryan B. Proudfoot, Yong Zhao
    Parameter-Specific FPGA Implementation of Edit-Distance Calculation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:209-215 [Conf]
  35. Vagner S. Rosa, Eduardo A. C. da Costa, Sergio Bampi
    A High Performance Parallel FIR Filters Generation Tool. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:216-222 [Conf]
  36. Euripides Sotiriades, Christos Kozanitis, Grigorios Chrysos, Apostolos Dollas
    Rapid Phototyping of a System-on-a-Chip for the BLAST Algorithm Implementation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:223-229 [Conf]
  37. Felix Mühlbauer, Christophe Bobda
    Design and Implementation of an Object Tracker on a Reconfigurable System on Chip. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 2006, pp:230- [Conf]
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