Conferences in DBLP

International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (asplos)
1991 (conf/asplos/91)

1. Andrew Wolfe, John Paul Shen
   A Variable Instruction Stream Extension to the VLIW Architecture. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:2-14 [Conf]
   
2. Manolis Katevenis, Nestoras Tzartzanis
   Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:15-27 [Conf]
   
3. Roland L. Lee, Alex Y. Kwok, Faye A. Briggs
   The Floating-Point Performance of a Superscalar SPARC Processor. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:28-37 [Conf]
   
4. David Callahan, Ken Kennedy, Allan Porterfield
   Software Prefetching. [Citation Graph (1, 0)][DBLP]
   ASPLOS, 1991, pp:40-52 [Conf]
   
5. Gurindar S. Sohi, Manoj Franklin
   High-Bandwidth Data Memory Systems for Superscalar Processors. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:53-62 [Conf]
   
6. Monica S. Lam, Edward E. Rothberg, Michael E. Wolf
   The Cache Performance and Optimizations of Blocked Algorithms. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:63-74 [Conf]
   
7. Jeffrey C. Mogul, Anita Borg
   The Effect of Context Switches on Cache Performance. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:75-84 [Conf]
   
8. David Keppel
   A Portable Interface for On-the-Fly Instruction Space Modifiction. [Citation Graph (0, 0)][DBLP]
   ASPLOS, 1991, pp:86-95 [Conf]
   
9. Andrew W. Appel, Kai Li
   Virtual Memory Primitives for User Programs. [Citation Graph (2, 0)][DBLP]
   ASPLOS, 1991, pp:96-107 [Conf]
   
10. Thomas E. Anderson, Henry M. Levy, Brian N. Bershad, Edward D. Lazowska
    The Interaction of Architecture and Operating System Design. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:108-120 [Conf]
    
11. David G. Bradlee, Susan J. Eggers, Robert R. Henry
    Integrating Register Allocation and Instruction Scheduling for RISCs. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:122-131 [Conf]
    
12. Manuel E. Benitez, Jack W. Davidson
    Code Generation for Streaming: An Access/Execute Mechanism. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:132-141 [Conf]
    
13. Rajive Bagrodia, Sharad Mathur
    Efficient Implementation of High Level Parallel Programs. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:142-151 [Conf]
    
14. William H. Mangione-Smith, Santosh G. Abraham, Edward S. Davidson
    Vector Register Design for Polycyclic Vector Scheduling. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:154-163 [Conf]
    
15. David E. Culler, Anurag Sah, Klaus E. Schauser, Thorsten von Eicken, John Wawrzynek
    Fine-Grain Parallelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:164-175 [Conf]
    
16. David W. Wall
    Limits of Instruction-Level Parallelism. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:176-188 [Conf]
    
17. Edward K. Lee, Randy H. Katz
    Performance Consequences of Parity Placement in Disk Arrays. [Citation Graph (2, 0)][DBLP]
    ASPLOS, 1991, pp:190-199 [Conf]
    
18. Vincent Cate, Thomas R. Gross
    Integration of Compression and Caching for a Two-Level File System. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:200-211 [Conf]
    
19. William J. Bolosky, Michael L. Scott, Robert P. Fitzgerald, Robert J. Fowler, Alan L. Cox
    NUMA Policies and Their Relation to Memory Architecture. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:212-221 [Conf]
    
20. David Chaiken, John Kubiatowicz, Anant Agarwal
    LimitLESS Directories: A Scalable Cache Coherence Scheme. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:224-234 [Conf]
    
21. Sang Lyul Min, Jong-Deok Choi
    An Efficient Cache-Based Access Anomaly Detection Scheme. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:235-244 [Conf]
    
22. Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy
    Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:245-257 [Conf]
    
23. Eric Freudenthal, Allan Gottlieb
    Process Coordination with Fetch-and-Increment. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:260-268 [Conf]
    
24. John M. Mellor-Crummey, Michael L. Scott
    Synchronization without Contention. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:269-278 [Conf]
    
25. Douglas Johnson
    The Case for a Read Barrier. [Citation Graph (1, 0)][DBLP]
    ASPLOS, 1991, pp:279-287 [Conf]
    
26. Robert F. Cmelik, Shing I. Kong, David R. Ditzel, Edmund J. Kelly
    An Analysis of SPARC and MIPS Instruction Set Utilization on the SPEC Benchmarks. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:290-302 [Conf]
    
27. C. Brian Hall, Kevin O'Brien
    Performance Characteristics of Architectural Features of the IBM RISC System/6000. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:303-309 [Conf]
    
28. Dileep Bhandarkar, Douglas W. Clark
    Performance From Architecture: Comparing a RISC and CISC with Similar Hardware Organization. [Citation Graph (0, 0)][DBLP]
    ASPLOS, 1991, pp:310-319 [Conf]