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Conferences in DBLP
- Mendel Rosenblum
Impact of virtualization on computer architecture and operating systems. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:1- [Conf]
- Keith Adams, Ole Agesen
A comparison of software and hardware techniques for x86 virtualization. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:2-13 [Conf]
- Stephen T. Jones, Andrea C. Arpaci-Dusseau, Remzi H. Arpaci-Dusseau
Geiger: monitoring the buffer cache in a virtual machine environment. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:14-24 [Conf]
- Jedidiah R. Crandall, Gary Wassermann, Daniela A. S. de Oliveira, Zhendong Su, Shyhtsun Felix Wu, Frederic T. Chong
Temporal search: detecting hidden malware timebombs with virtual machines. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:25-36 [Conf]
- Shan Lu, Joseph Tucek, Feng Qin, Yuanyuan Zhou
AVIO: detecting atomicity violations via access interleaving invariants. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:37-48 [Conf]
- Min Xu, Mark D. Hill, Rastislav Bodík
A regulated transitive reduction (RTR) for longer memory race recording. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:49-60 [Conf]
- Michael D. Bond, Kathryn S. McKinley
Bell: bit-encoding online memory leak detection. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:61-72 [Conf]
- Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin
Ultra low-cost defect protection for microprocessor pipelines. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:73-82 [Conf]
- Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasarathy
Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:83-94 [Conf]
- Angshuman Parashar, Anand Sivasubramaniam, Sudhanva Gurumurthi
SlicK: slice-based locality exploitation for efficient redundant multithreading. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:95-105 [Conf]
- Taliver Heath, Ana Paula Centeno, Pradeep George, Luiz Ramos, Yogesh Jaluria
Mercury and freon: temperature emulation and management for server systems. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:106-116 [Conf]
- Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner
PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:117-128 [Conf]
- Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha
A spatial path scheduling algorithm for EDGE architectures. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:129-140 [Conf]
- Martha Mercaldi, Steven Swanson, Andrew Petersen, Andrew Putnam, Andrew Schwerin, Mark Oskin, Susan J. Eggers
Instruction scheduling for a tiled dataflow architecture. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:141-150 [Conf]
- Michael I. Gordon, William Thies, Saman P. Amarasinghe
Exploiting coarse-grained task, data, and pipeline parallelism in stream programs. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:151-162 [Conf]
- Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu
Tartan: evaluating spatial computation for whole program execution. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:163-174 [Conf]
- Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith
A performance counter architecture for computing accurate CPI components. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:175-184 [Conf]
- Benjamin C. Lee, David M. Brooks
Accurate and efficient regression modeling for microarchitectural performance and power prediction. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:185-194 [Conf]
- Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R. de Supinski, Martin Schulz
Efficiently exploring architectural design spaces via predictive modeling. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:195-206 [Conf]
- Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru Venkataramani, Milos Prvulovic
Comprehensively and efficiently protecting the heap. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:207-218 [Conf]
- Trishul M. Chilimbi, Vinod Ganapathy
HeapMD: identifying heap-based bugs using anomaly detection. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:219-228 [Conf]
- Satish Narayanasamy, Cristiano Pereira, Brad Calder
Recording shared memory dependencies using strata. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:229-240 [Conf]
- Jaidev P. Patwardhan, Vijeta Johri, Chris Dwyer, Alvin R. Lebeck
A defect tolerant self-organizing nanoscale SIMD architecture. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:241-251 [Conf]
- Ethan Schuchman, T. N. Vijaykumar
A program transformation and architecture support for quantum uncomputation. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:252-263 [Conf]
- Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood
Introspective 3D chips. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:264-273 [Conf]
- Jason F. Cantin, Mikko H. Lipasti, James E. Smith
Stealth prefetching. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:274-282 [Conf]
- Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi
Computation spreading: employing hardware migration to specialize CMP cores on-the-fly. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:283-292 [Conf]
- Jason E. Miller, Anant Agarwal
Software-based instruction caching for embedded processors. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:293-302 [Conf]
- Xin Li, Marian Boldt, Reinhard von Hanxleden
Mapping esterel onto a multi-threaded embedded processor. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:303-314 [Conf]
- Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhardt
Integrated network interfaces for high-bandwidth TCP/IP. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:315-324 [Conf]
- David Tarditi, Sidd Puri, Jose Oglesby
Accelerator: using data parallelism to program GPUs for general-purpose uses. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:325-335 [Conf]
- Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum
Hybrid transactional memory. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:336-346 [Conf]
- Weihaw Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Brad Calder, Osvaldo Colavin
Unbounded page-based transactional memory. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:347-358 [Conf]
- Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore, Luke Yen, Mark D. Hill, Ben Liblit, Michael M. Swift, David A. Wood
Supporting nested transactional memory in logTM. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:359-370 [Conf]
- JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun
Tradeoffs in transactional memory virtualization. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:371-381 [Conf]
- Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue, Toshio Nakatani
A new idiom recognition framework for exploiting hardware-assist instructions. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:382-393 [Conf]
- Sorav Bansal, Alex Aiken
Automatic generation of peephole superoptimizers. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:394-403 [Conf]
- Armando Solar-Lezama, Liviu Tancau, Rastislav Bodík, Sanjit A. Seshia, Vijay A. Saraswat
Combinatorial sketching for finite programs. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:404-415 [Conf]
- Jeff Da Silva, J. Gregory Steffan
A probabilistic pointer analysis for speculative optimizations. [Citation Graph (0, 0)][DBLP]
ASPLOS, 2006, pp:416-425 [Conf]
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