Conferences in DBLP
Amir Pnueli Ranking Abstraction as a Companion to Predicate Abstraction, . [Citation Graph (0, 0)][DBLP ] Conf ] Aaron R. Bradley , Zohar Manna Termination and Invariance Analysis of Loops. [Citation Graph (0, 0)][DBLP ] Conf ] Wolfgang Thomas Some Perspectives of Infinite-State Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Limor Fix , Orna Grumberg , Amnon Heyman , Tamir Heyman , Assaf Schuster Verifying Very Large Industrial Circuits Using 100 Processes and Beyond. [Citation Graph (0, 0)][DBLP ] Conf ] Debashis Sahoo , Jawahar Jain , Subramanian K. Iyer , David L. Dill A New Reachability Algorithm for Symmetric Multi-processor Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Yuhong Zhao , Martin Kardos , Simon Oberthür , Franz J. Rammig Comprehensive Verification Framework for Dependability of Self-optimizing Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Giuseppe Della Penna , Igor Melatti , Benedetto Intrigila , Enrico Tronci Exploiting Hub States in Automatic Verification. [Citation Graph (0, 0)][DBLP ] Conf ] Ali Habibi , Sofiène Tahar An Approach for the Verification of SystemC Designs Using AsmL. [Citation Graph (0, 0)][DBLP ] Conf ] Yongsun Choi , J. Leon Zhao Decomposition-Based Verification of Cyclic Workflows. [Citation Graph (0, 0)][DBLP ] Conf ] Werner Damm , Guilherme Pinto , Stefan Ratschan Guaranteed Termination in the Verification of LTL Properties of Non-linear Robust Discrete Time Hybrid Systems. [Citation Graph (0, 0)][DBLP ] Conf ] A. Dubey , X. Wu , H. Su , T. J. Koo Computation Platform for Automatic Analysis of Embedded Software Systems Using Model Based Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Andrei Voinikonis Quantitative and Qualitative Analysis of Temporal Aspects of Complex Activities. [Citation Graph (0, 0)][DBLP ] Conf ] Geng-Dian Huang , Farn Wang Automatic Test Case Generation with Region-Related Coverage Annotations for Real-Time Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Maciej Szreter Selective Search in Bounded Model Checking of Reachability Properties. [Citation Graph (0, 0)][DBLP ] Conf ] Tun Li , Yang Guo , Sikun Li , GongJie Liu Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Charles A. Lakos , Lars M. Kristensen State Space Exploration of Object-Based Systems Using Equivalence Reduction and the Sweepline Method. [Citation Graph (0, 0)][DBLP ] Conf ] Sami Evangelista , Serge Haddad , Jean-François Pradat-Peyre Syntactical Colored Petri Nets Reductions. [Citation Graph (0, 0)][DBLP ] Conf ] Venkatesh Mysore , Carla Piazza , Bud Mishra Algorithmic Algebraic Model Checking II: Decidability of Semi-algebraic Model Checking and Its Applications to Systems Biology. [Citation Graph (0, 0)][DBLP ] Conf ] Isao Yagi , Yoshiaki Takata , Hiroyuki Seki A Static Analysis Using Tree Automata for XML Access Control. [Citation Graph (0, 0)][DBLP ] Conf ] Stéphane Demri , David Nowak Reasoning About Transfinite Sequences. [Citation Graph (0, 0)][DBLP ] Conf ] Bernd Finkbeiner , Sven Schewe Semi-automatic Distributed Synthesis. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoyu Mao , Janette Cardoso , Robert Valette A New Graph of Classes for the Preservation of Quantitative Temporal Constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Béatrice Bérard , Franck Cassez , Serge Haddad , Didier Lime , Olivier H. Roux Comparison of Different Semantics for Time Petri Nets. [Citation Graph (0, 0)][DBLP ] Conf ] Mouna Saad , Leila Jemni Ben Ayed Introducing Dynamic Properties with Past Temporal Operators in the B Refinement. [Citation Graph (0, 0)][DBLP ] Conf ] Olivier Tardieu , Stephen A. Edwards Approximate Reachability for Dead Code Elimination in Esterel. [Citation Graph (0, 0)][DBLP ] Conf ] Purandar Bhaduri Synthesis of Interface Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Sharon Shoham , Orna Grumberg Multi-valued Model Checking Games. [Citation Graph (0, 0)][DBLP ] Conf ] Shang-Wei Lin , Pao-Ann Hsiung , Chun-Hsian Huang , Yean-Ru Chen Model Checking Prioritized Timed Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Fuzhi Wang , Marta Z. Kwiatkowska An MTBDD-Based Implementation of Forward Reachability for Probabilistic Timed Automata. [Citation Graph (0, 0)][DBLP ] Conf ] Jean-Marie Orset , Baptiste Alcalde , Ana R. Cavalli An EFSM-Based Intrusion Detection System for Ad Hoc Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Pierre Combes , David Harel , Hillel Kugler Modeling and Verification of a Telecommunication Application Using Live Sequence Charts and the Play-Engine Tool. [Citation Graph (0, 0)][DBLP ] Conf ] Moonzoo Kim , Kyo Chul Kang Formal Construction and Verification of Home Service Robots: A Case Study. [Citation Graph (0, 0)][DBLP ] Conf ] Gary Lindstrom , Peter C. Mehlitz , Willem Visser Model Checking Real Time Java Using Java PathFinder. [Citation Graph (0, 0)][DBLP ] Conf ] Guy Edward Gallasch , Jonathan Billington Using Parametric Automata for the Verification of the Stop-and-Wait Class of Protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Sébastien Bardin , Alain Finkel , Jérôme Leroux , Ph. Schnoebelen Flat Acceleration in Symbolic Model Checking. [Citation Graph (0, 0)][DBLP ] Conf ] Jérôme Leroux , Grégoire Sutre Flat Counter Automata Almost Everywhere! [Citation Graph (0, 0)][DBLP ] Conf ] 