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Journals in DBLP

IEEE Design & Test of Computers
2003, volume: 20, number: 6

  1. Rajesh Gupta
    From the EIC: The changing face of IC design and its industry. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:1-0 [Journal]
  2. Soha Hassoun, Yong-Bin Kim, Fabrizio Lombardi
    Guest Editors' Introduction: Clockless VLSI Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:5-8 [Journal]
  3. Alain J. Martin, Mika Nyström, Catherine G. Wong
    Three Generations of Asynchronous Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:9-17 [Journal]
  4. Stephen H. Unger
    Reducing Power Dissipation, Delay, and Area in Logic Circuits by Narrowing Transistors. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:18-24 [Journal]
  5. Satish K. Bandapati, Scott C. Smith, Minsu Choi
    Design and Characterization of Null Convention Self-Timed Multipliers. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:26-36 [Journal]
  6. Steve Masteller, Lief Sorenson
    Cycle Decomposition in NCL. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:38-43 [Journal]
  7. Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg
    Implementation of a Self-Timed Segmented Bus. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:44-50 [Journal]
  8. Woo Jin Kim, Yong-Bin Kim
    Automating Wave-Pipelined Circuit Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:51-58 [Journal]
  9. Alberto L. Sangiovanni-Vincentelli
    The Tides of EDA. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:59-75 [Journal]

  10. Fabless or IDM? What the Future Holds for Both: An Interview with Cirrus Logic Chairman, Michael L. Hackworth. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:76-85 [Journal]

  11. What Is the Next Implementation Fabric? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:86-95 [Journal]
  12. Andrew B. Kahng
    How much variability can designers tolerate? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:96-97 [Journal]
  13. Wolfgang Roethig
    New advanced library format standard approved. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:98-99 [Journal]
  14. Eric Dupont, Grant Martin
    Panel Summaries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:100-102 [Journal]
  15. Vladimir Hahanov, Raimund Ubar
    Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:103-0 [Journal]

  16. Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:104-105 [Journal]

  17. Design Automation Technical Committee Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:106-0 [Journal]

  18. 2003 Annual Index IEEE Design & Test of Computers Volume 20. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:108-119 [Journal]
  19. Suhwan Kim, Conrad H. Ziesler
    A clockless future for systems on chip. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:6, pp:120-0 [Journal]
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