Journals in DBLP

IEEE Design & Test of Computers
2001, volume: 18, number: 1

1. 
   D&T and the Future. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:1-0 [Journal]
   
2. 
   News. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:5-7 [Journal]
   
3. Fabrizio Lombardi, Cecilia Metra
   Guest Editors' Introduction: Defect-Oriented Diagnosis for Very Deep-Submicron Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:8-9 [Journal]
   
4. Jien-Chung Lo, William D. Armitage, Corbet S. Johnson
   Using Atomic Force Microscopy for Deep-Submicron Failure Analysis. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:10-18 [Journal]
   
5. Srikanth Venkataraman, Scott Brady Drummonds
   Poirot: Applications of a Logic Fault Diagnosis Tool. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:19-30 [Journal]
   
6. Jennifer Dworak, Jason D. Wicker, Sooryong Lee, Michael R. Grimaila, M. Ray Mercer, Kenneth M. Butler, Bret Stewart, Li-C. Wang
   Defect-Oriented Testing and Defective-Part-Level Prediction. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:31-41 [Journal]
   
7. Khurram Muhammad, Kaushik Roy
   Fault Detection and Location Using IDD Waveform Analysis. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:42-49 [Journal]
   
8. Jim Plusquellic
   IC Diagnosis Using Multiple Supply Pad IDDQs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:50-61 [Journal]
   
9. David San Segundo Bello, Ronald J. W. T. Tangelder, Hans G. Kerkhoff
   Modeling a Verification Test System for Mixed-Signal Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:1, pp:63-71 [Journal]
   
10. Mani Soma, Sam D. Huynh, Jinyan Zhang, Seongwon Kim, Giri Devarayanadurg
    Hierarchical ATPG for Analog Circuits and Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:72-81 [Journal]
    
11. 
    A D&T Roundtable: Are Single-Chip Multiprocessors in Reach? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:82-89 [Journal]
    
12. 
    Panel Summaries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:90-92 [Journal]
    
13. 
    Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:93-0 [Journal]
    
14. 
    DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:94-0 [Journal]
    
15. 
    TTTC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:95-0 [Journal]
    
16. 
    Danger! Submicron Defects! [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:1, pp:96-0 [Journal]