Journals in DBLP
About this super issue. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:1-0 [Journal ] News. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:6- [Journal ] Luciano Lavagno , Nanette Collins DAC 97 Panel: Next-Generation HDLs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:7-8 [Journal ] Conference Reports. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:8-10 [Journal ] Gadi Singer The Future of Test and DFT. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:11-14 [Journal ] Tony Ambler , Magdy S. Abadir Design and Test Economics-An Extra Dimension. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:15-16 [Journal ] José M. Miranda A BIST and Boundary-Scan Economics Framework. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:17-23 [Journal ] James Debardelaben , Vijay K. Madisetti , Anthony J. Gadient Incorporating Cost Modeling in Embedded-System Design. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:24-35 [Journal ] Craig T. Pynn Analyzing Manufacturing Test Costs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:36-40 [Journal ] Jon Turino Test Economics in the 21st Century. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:41-44 [Journal ] Magdy S. Abadir , Rohit Kapur Cost-Driven Ranking of Memory Elements for Partial Intrusion. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:45-50 [Journal ] Des Farren , Anthony P. Ambler The Economics of System-Level Testing. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:51-58 [Journal ] Jerry M. Soden , Richard E. Anderson , Christopher L. Henderson IC Failure Analysis: Magic, Mystery, and Science. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:59-69 [Journal ] Donald Staab , Eugene R. Hnatek Diagnosing IC Failures in a Fast Environment. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:70-75 [Journal ] David P. Vallett IC Failure Analysis: The Importance of Test and Diagnostics. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:76-82 [Journal ] Kenneth M. Butler , Karl Johnson , Jeff Platt , Anjali Kinra , Jayashree Saxena Automated Diagnosis in Testing and Failure Analysis. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:83-89 [Journal ] Keith Baker , Jos van Beers Shmoo Plotting: The Black Art of IC Testing. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:90-97 [Journal ] Robert C. Aitken Modeling the Unmodelable: Algorithmic Fault Diagnosis. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:98-103 [Journal ] Mario Zagar , Danko Basch Microprocessor Architecture Design with ATLAS. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:104-112 [Journal ] A D&T Roundtable: Built-In Self-Test for Designers. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:113-121 [Journal ] Design Automation Technical Committee Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:123-125 [Journal ] Test Technology Tc Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:126-127 [Journal ] Jerry M. Soden , Christopher L. Henderson Still in the Stone Age? [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1997, v:14, n:3, pp:128-0 [Journal ]