Journals in DBLP

IEEE Design & Test of Computers
2004, volume: 21, number: 2

1. Rajesh Gupta
   From the EIC: Past successes, future challenges. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:77-78 [Journal]
   
2. Roy L. Russo
   Serving a growing community: How D&T began. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:79-0 [Journal]
   
3. Magdy S. Abadir, Li-C. Wang
   Guest Editors' Introduction: The Verification and Test of Complex Digital ICs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:80-82 [Journal]
   
4. Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv
   Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:84-93 [Journal]
   
5. Carl Scafidi, J. Douglas Gibson, Rohit Bhatia
   Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:94-101 [Journal]
   
6. Fulvio Corno, Ernesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero
   Automatic Test Program Generation: A Case Study. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:102-109 [Journal]
   
7. Chia-Chih Yen, Jing-Yang Jou, Kuang-Chien Chen
   A Divide-and-Conquer-Based Algorithm for Automatic Simulation Vector Generation. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:111-120 [Journal]
   
8. Prabhat Mishra, Nikil Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
   A Top-Down Methodology for Microprocessor Validation. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:122-131 [Journal]
   
9. Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Li-C. Wang
   Safety Property Verification Using Sequential SAT and Bounded Model Checking. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2004, v:21, n:2, pp:132-143 [Journal]
   
10. Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker
    ITC 2003 Roundtable: Design for Manufacturability. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:144-156 [Journal]
    
11. Peter J. Ashenden
    Policies and procedures - who needs them? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:157-158 [Journal]
    
12. William Mann
    Southwest Test Workshop 2004. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:159-0 [Journal]
    
13. Carol Stolicny, Tapio Koivukangas, Rubin A. Parekhji, Ian G. Harris, Rob Aitken
    ITC 2003 panels: Part 1. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:160-163 [Journal]
    
14. Paolo Prinetto, Alfredo Benso
    Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:164-165 [Journal]
    
15. John Willis, Andreas Kuehlmann
    Design Automation TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:166-0 [Journal]
    
16. Prab Varma
    Verification evolution or industrial revolution? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2004, v:21, n:2, pp:168-0 [Journal]