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Journals in DBLP

IEEE Design & Test of Computers
1995, volume: 12, number: 1


  1. EIC Message. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:2-4 [Journal]
  2. Ajit M. Prabhu
    Managing your EDA investments. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:5-7 [Journal]

  3. Call for Articles. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:7-0 [Journal]

  4. News. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:8-9 [Journal]

  5. Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:10-11 [Journal]
  6. Vinod K. Agarwal
    VTS 1994 Panel Report on BIST for Consumer Products. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:12-0 [Journal]
  7. Tam-Anh Chu, Rabindra K. Roy
    Guest Editors' Introduction: More Practical Asynchronous Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:13-0 [Journal]
  8. Victor Varshavsky, Vyacheslav Marakhovsky, Vadim V. Smolensky
    Designing Self-Timed Devices Using the Finite Automaton Model. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:14-23 [Journal]
  9. Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger
    Automatic Verification of Asynchronous Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:24-31 [Journal]

  10. Call for Articles. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:31-0 [Journal]
  11. Alexandre Yakovlev, Albert Koelmans, Luciano Lavagno
    High-Level Modeling and Design of Asynchronous Interface Logic. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:32-40 [Journal]
  12. Shoab Ahmed Khan, Vijay K. Madisetti
    System Partitioning of MCMs for Low Power. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:41-52 [Journal]
  13. Daniel D. Gajski, Frank Vahid
    Specification and Design of Embedded Hardware-Software Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:53-67 [Journal]
  14. Yuejian Wu, André Ivanov
    Reducing Hardware with Fuzzy Multiple Signature Analysis. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:68-74 [Journal]

  15. A D&T Roundtable: Test Benchmarking. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:75-82 [Journal]

  16. Author Guidelines: IEEE Design & Test of Computers. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:85-86 [Journal]

  17. New Products. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:87-89 [Journal]

  18. DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:91-92 [Journal]

  19. Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1995, v:12, n:1, pp:93-95 [Journal]
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