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Journals in DBLP

IEEE Design & Test of Computers
2003, volume: 20, number: 3

  1. Rajesh Gupta
    From the Editor in Chief: A "Powerful" Issue! [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:1-0 [Journal]
  2. Sani R. Nassif, Soha Hassoun
    Guest Editors' Introduction: On-Chip Power Distribution Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:5-6 [Journal]
  3. Sachin S. Sapatnekar, Haihua Su
    Analysis and Optimization of Power Grids. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:7-15 [Journal]
  4. Rajendran Panda, Savithri Sundareswaran, David Blaauw
    Impact of Low-Impedance Substrate on Power Supply Integrity. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:16-22 [Journal]
  5. Hui Zheng, Byron Krauter, Lawrence T. Pileggi
    Electrical Modeling of Integrated-Package Power and Ground Distributions. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:24-31 [Journal]
  6. Arindam Mukherjee, Malgorzata Marek-Sadowska
    Clock and Power Gating with Timing Closure. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:32-39 [Journal]
  7. Ed Grochowski, David Ayers, Vivek Tiwari
    Microarchitectural dI/dt Control. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:40-47 [Journal]
  8. Yervant Zorian
    Guest Editor's Introduction: Advances in Infrastructure IP. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:49-0 [Journal]
  9. Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto
    Online Self-Repair of FIR Filters. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:50-57 [Journal]
  10. Yervant Zorian, Samvel K. Shoukourian
    Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:58-66 [Journal]
  11. Md. Saffat Quasem, Zhigang Jiang, Sandeep K. Gupta
    Benefits of a SoC-Specific Test Methodology. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:68-77 [Journal]
  12. C. J. Clark, Mike Ricchetti
    Infrastructure IP for Configuration and Test of Boards and Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:78-87 [Journal]
  13. Luciano Lavagno, Limor Fix
    DAC Highlights. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:88-89 [Journal]
  14. Alberto L. Sangiovanni-Vincentelli
    DAC Turns 40! [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:90-96 [Journal]
  15. Pat O. Pistilli
    DAC: Serving the EDA Community for 40 Years. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:97-98 [Journal]
  16. Ronald A. Rohrer
    DAC, Moore's Law Still Drive EDA. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:99-100 [Journal]
  17. Giovanni De Micheli
    CASS Brings Publishing to Its DAC Partnership. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:101-102 [Journal]
  18. Soha Hassoun, Geert Janssen
    First CADathlon Programming Contest held at 2002 ICCAD. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:104-107 [Journal]
  19. Yervant Zorian
    IEEE CASS becomes D&T Copublisher. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:108-0 [Journal]
  20. Andrew B. Kahng
    Bringing down NRE. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:110-111 [Journal]
  21. Peter J. Ashenden
    VHDL-200X: The Next Revision. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:112-113 [Journal]
  22. Tom Anderson
    Who Cares about System Verification? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:114-0 [Journal]

  23. Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:115-0 [Journal]

  24. TTTC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:116-117 [Journal]

  25. DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:118-0 [Journal]
  26. Mary Jane Irwin
    Power-Aware Designers at Odds with Power Grid Designers? [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2003, v:20, n:3, pp:120-0 [Journal]
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The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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