Journals in DBLP

IEEE Design & Test of Computers
2001, volume: 18, number: 5

1. Yervant Zorian
   EIC Message. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:1-0 [Journal]
   
2. 
   News. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:5-6 [Journal]
   
3. Wayne Wolf, Ahmed Amine Jerraya
   Application-Specific System-on-a-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:7-0 [Journal]
   
4. Wander O. Cesário, Gabriela Nicolescu, Lovic Gauthier, Damien Lyonnard, Ahmed Amine Jerraya
   Colif: A Design Representation for Application-Specific Multiprocessor SOCs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:8-20 [Journal]
   
5. Santanu Dutta, Rune Jensen, Alf Rieckmann
   Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:21-31 [Journal]
   
6. Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Ronoldo Wagner, Colleen Fellenz, Michael Muhlada, William R. Lee, Foster White, Jean-Marc Daveau
   Automating the Design of SOCs Using Cores. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:32-45 [Journal]
   
7. Peng Yang, Chun Wong, Paul Marchal, Francky Catthoor, Dirk Desmet, Diederik Verkest, Rudy Lauwereins
   Energy-Aware Runtime Scheduling for Embedded-Multiprocessor SOCs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:46-58 [Journal]
   
8. Tony Ambler, Donald L. Wheater
   Test Trade-Offs Take Center Stage at ITC. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:59-0 [Journal]
   
9. Jay Bedsole, Rajesh Raina, Al Crouch, Magdy S. Abadir
   Very Low Cost Testers: Opportunities and Challenges. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 2001, v:18, n:5, pp:60-69 [Journal]
   
10. Louis Y. Ungar, Tony Ambler
    Economics of Built-in Self-Test. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:70-79 [Journal]
    
11. Anshuman Chandra, Krishnendu Chakrabarty
    Test Resource Partitioning for SOCs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:80-91 [Journal]
    
12. Alfredo Benso, Silvia Chiusano, Giorgio Di Natale, Paolo Prinetto, Monica Lobetti Bodoni
    Online and Offline BIST in IP-Core Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:92-99 [Journal]
    
13. Sérgio Akira Ito, Luigi Carro, Ricardo Pezzuol Jacobi
    Making Java Work for Microcontroller Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:100-110 [Journal]
    
14. 
    Design Closure with Cell-Based Synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:112-119 [Journal]
    
15. 
    Technology Continuous Education. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:120-0 [Journal]
    
16. Tom Anderson
    Your Core-My Problem? Integration and Verification of IP. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:121- [Journal]
    
17. Peter J. Ashenden
    VHDL Standards. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:122-123 [Journal]
    
18. 
    New Products. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:124-0 [Journal]
    
19. 
    DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:125-0 [Journal]
    
20. 
    TTTC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:126-127 [Journal]
    
21. Tony Ambler
    Test Strategies and Marriage Partners. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2001, v:18, n:5, pp:128-0 [Journal]