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Journals in DBLP

IEEE Design & Test of Computers
1997, volume: 14, number: 2


  1. VHDL fault injection questioned. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:2-3 [Journal]

  2. News. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:3-0 [Journal]
  3. Ivo Bolsens, Marco Cecchini
    IP-based business conflicts. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:4- [Journal]

  4. Adventures in the Mainframe Trade. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:5-13 [Journal]
  5. Peter Marwedel, Carlos A. López-Barrio
    Guest Editor's Introduction: Design, Design Automation, and Test in Europe. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:14-15 [Journal]
  6. Clifford Liem, François Naçabal, Carlos A. Valderrama, Pierre G. Paulin, Ahmed Amine Jerraya
    System-on-a-Chip Cosimulation and Compilation. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:16-25 [Journal]
  7. Manoj Sachdev
    Open Defects in CMOS RAM Address Decoders. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:26-33 [Journal]
  8. Jean-Michel Karam, Bernard Courtois, Hicham Boutamine
    CAD Tools for Bridging Microsystems and Foundries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:34-39 [Journal]
  9. Reinaldo A. Bergamaschi, Salil Raje
    Observable Time Windows: Verifying High-Level Synthesis Results. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:40-50 [Journal]
  10. Rolf Drechsler, Bernd Becker, Stefan Ruppertz
    The K*BMD: A Verification Data Structure. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:51-59 [Journal]
  11. Michael Nicolaidis, Ricardo de Oliveira Duarte, Salvador Manich, Joan Figueras
    Fault-Secure Parity Prediction Arithmetic Operators. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:60-71 [Journal]
  12. Rajesh K. Gupta, Stan Y. Liao
    Using a Programming Language for Digital System Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:72-80 [Journal]

  13. Testing Embedded Cores. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:81-89 [Journal]

  14. Author Guidelines IEEE Design & Test. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:90-91 [Journal]

  15. Design Automation Technical Committee Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:93-0 [Journal]

  16. Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:94-95 [Journal]
  17. Scott Davidson
    Why projects are late. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1997, v:14, n:2, pp:96-0 [Journal]
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