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Journals in DBLP

IEEE Design & Test of Computers
2006, volume: 23, number: 5

  1. Kwang-Ting (Tim) Cheng
    The New World of ESL Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:333- [Journal]
  2. Sandeep K. Shukla, Carl Pixley, Gary Smith
    Guest Editors' Introduction: The True State of the Art of ESL Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:335-337 [Journal]
  3. Patrick Schaumont, Ingrid Verbauwhede
    A Component-Based Design Environment for ESL Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:338-347 [Journal]
  4. Ivan Radojevic, Zoran A. Salcic, Partha S. Roop
    Modeling Embedded Systems: From SystemC and Esterel to DFCharts. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:348-358 [Journal]
  5. Douglas Densmore, Roberto Passerone
    A Platform-Based Taxonomy for ESL Design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:359-374 [Journal]
  6. Stephen A. Edwards
    The Challenges of Synthesizing Hardware from C-Like Languages. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:375-386 [Journal]
  7. John Sanguinetti
    A Different View: Hardware Synthesis from SystemC is a Maturing Technology. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:387- [Journal]
  8. Kenneth M. Butler
    Guest Editor's Introduction: ITC Helps Get More Out of Test. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:388-389 [Journal]
  9. Jeffrey E. Nelson, Thomas Zanon, Jason G. Brown, Osei Poku, R. D. (Shawn) Blanton, Wojciech Maly, Brady Benware, Chris Schuermyer
    Extracting Defect Density and Size Distributions from Product ICs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:390-400 [Journal]
  10. Nisar Ahmed, Mohammad Tehranipoor
    Improving Transition Delay Test Using a Hybrid Method. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:402-412 [Journal]
  11. Sebastià A. Bota, José Luis Rosselló, Carol de Benito, Ali Keshavarzi, Jaume Segura
    Impact of Thermal Gradients on Clock Skew and Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:414-424 [Journal]
  12. Bruce C. Kim
    Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:425- [Journal]
  13. Scott Davidson
    Book Reviews: A Comprehensive EDA Handbook. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:426-427 [Journal]
  14. Victor Berman
    Standards: DASC sees moves toward formality in design. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:428-429 [Journal]

  15. CEDA Currents. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:430-431 [Journal]
  16. Anne E. Gattiker
    Getting More out of ITC. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2006, v:23, n:5, pp:432- [Journal]
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