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Journals in DBLP

IEEE Design & Test of Computers
2005, volume: 22, number: 2

  1. Rajesh K. Gupta
    FPGA-enabled computing architectures. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:81- [Journal]
  2. Patrick Lysaght, P. A. Subrahmanyam
    Guest Editors' Introduction: Advances in Configurable Computing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:85-89 [Journal]
  3. Bingfeng Mei, Andy Lambrechts, Diederik Verkest, Jean-Yves Mignolet, Rudy Lauwereins
    Architecture Exploration for a Reconfigurable Architecture Template. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:90-101 [Journal]
  4. Miljan Vuletic, Laura Pozzi, Paolo Ienne
    Seamless Hardware-Software Integration in Reconfigurable Computing Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:102-113 [Journal]
  5. Chen Chang, John Wawrzynek, Robert W. Brodersen
    BEE2: A High-End Reconfigurable Computing System. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:114-125 [Journal]
  6. Daniel T. Hamling
    Test Solution Selection Using Multiple-Objective Decision Models and Analyses. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:126-134 [Journal]
  7. Jürgen Becker, Alexander Thomas
    Scalable Processor Instruction Set Extension. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:136-148 [Journal]
  8. Chulsung Park, Jinfeng Liu, Pai H. Chou
    B#: A Battery Emulator and Power-Profiling Instrument. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:150-159 [Journal]
  9. Ming Shae Wu, Chung-Len Lee
    Using a Periodic Square Wave Test Signal to Detect Crosstalk Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:160-169 [Journal]
  10. Ken Wagner, Patrick P. Gelsinger
    Driving the $5 Billion Innovation Engine at Intel: An Interview with Patrick P. Gelsinger, Digital Enterprise Group Senior Vice President and General Manager, Intel. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:170-180 [Journal]
  11. Victor Berman
    Sharing standards work with Japan. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:182-183 [Journal]
  12. Grant Martin
    The network is the chip. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:184-185 [Journal]
  13. Carol Stolicny
    ITC 2004 panels: Part 1. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:186-189 [Journal]

  14. DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:190- [Journal]
  15. Tom Kean
    Déjà vu, all over again. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2005, v:22, n:2, pp:192- [Journal]
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