Journals in DBLP

IEEE Design & Test of Computers
1998, volume: 15, number: 2

1. 
   Our new world. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:1-0 [Journal]
   
2. 
   Letters. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:3-0 [Journal]
   
3. Patrick Dewilde
   Date 98. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:4-0 [Journal]
   
4. 
   Panel Summaries. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:5-7 [Journal]
   
5. Colin Maunder
   The Future: Plug and Pray? [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:8-13 [Journal]
   
6. Vladimir Székely, Márta Rencz, Bernard Courtois
   Tracing the Thermal Behavior of ICs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:14-21 [Journal]
   
7. Kayhan Küçükçakar, Chih-Tung Chen, Jie Gong, Wim Philipsen, Thomas E. Tkacik
   Matisse: An Architectural Design Tool for Commodity ICs. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:22-33 [Journal]
   
8. Peter J. Ashenden, Philip A. Wilsey, Dale E. Martin
   SUAVE: Extending VHDL to Improve Data Modeling Support. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:34-44 [Journal]
   
9. Rolf Ernst
   Codesign of Embedded Systems: Status and Trends. [Citation Graph (0, 0)][DBLP]
   IEEE Design & Test of Computers, 1998, v:15, n:2, pp:45-54 [Journal]
   
10. Yeong-Ruey Shieh, Cheng-Wen Wu
    Control and Observation Structures for Analog Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:56-64 [Journal]
    
11. Wen-Jong Fang, Allen C.-H. Wu
    Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:65-72 [Journal]
    
12. Samvel K. Shoukourian
    A Unified Design Methodology for Offline and Online Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:73-79 [Journal]
    
13. Yuri V. Malyshenko
    Functional Fault Models for Analog Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:80-85 [Journal]
    
14. Meh-Ron Amerian, William D. Atwell Jr., Ian Burgess, Gary D. Fleeman, David Y. Lepejian, T. W. Williams, Farzad Zarrinfar, Yervant Zorian
    A D&T Roundtable: Testing Mixed Logic and DRAM Chips. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:86-92 [Journal]
    
15. 
    DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:93-0 [Journal]
    
16. 
    Test Technology TC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:94-95 [Journal]
    
17. Scott Davidson
    The Newer Colossus. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1998, v:15, n:2, pp:96-0 [Journal]