Journals in DBLP
Rajesh Gupta EIC Message: The Neglected Community. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:3-0 [Journal ] Grant Martin Guest Editor's Introduction: The Reuse of Complex Architectures. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:4-5 [Journal ] Andrew Mihal , Chidamber Kulkarni , Matthew W. Moskewicz , Mel M. Tsai , Niraj Shah , Scott J. Weber , Yujia Jin , Kurt Keutzer , Christian Sauer , Kees A. Vissers , Sharad Malik Developing Architectural Platforms: A Disciplined Approach. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:6-16 [Journal ] Pierre G. Paulin , Chuck Pilkington , Essaid Bensoudane StepNP: A System-Level Exploration Platform for Network Processors. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:17-26 [Journal ] Clifford Liem , Francois Breant , Sarveta Jadhav , Ray O'Farrell , Ray Ryan , Oz Levia Embedded Tools for a Configurable and Customizable DSP Architecture. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:27-35 [Journal ] Greg Stitt , Frank Vahid Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:36-43 [Journal ] Vincent John Mooney III , Douglas M. Blough A Hardware-Software Real-Time Operating System Framework for SoCs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:44-51 [Journal ] Wander O. Cesário , Damien Lyonnard , Gabriela Nicolescu , Yanick Paviot , Sungjoo Yoo , Ahmed Amine Jerraya , Lovic Gauthier , Mario Diaz-Nava Multiprocessor SoC Platforms: A Component-Based Design Approach. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:52-63 [Journal ] Gloria Huertas , Diego Vázquez , Eduardo J. Peralías , Adoración Rueda , José Luis Huertas Practical Oscillation-Based Test of Integrated Filters. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:64-72 [Journal ] Gloria Huertas , Diego Vázquez , Eduardo J. Peralías , Adoración Rueda , José Luis Huertas Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:73-82 [Journal ] Michel Renovell , Florence Azaïs , Yves Bertrand Improving Defect Detection in Static-Voltage Testing. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:83-89 [Journal ] Amit Chowdhary , Rajesh K. Gupta A Methodology for Synthesis of Data Path Circuitse. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:90-100 [Journal ] Conference Reports. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:101-0 [Journal ] Panel Summaries. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:102-103 [Journal ] Andrew B. Kahng The Road Ahead: The significance of packaging. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:104-105 [Journal ] Peter J. Ashenden Standards: Technical activities in Accellera. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:106- [Journal ] DATC Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:107-0 [Journal ] TTTC Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:108-109 [Journal ] Annual Index. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:110-119 [Journal ] The Last Byte. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 2002, v:19, n:6, pp:120-0 [Journal ]