Journals in DBLP
Yervant Zorian Focus on DRAMs. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:1-0 [Journal ] News. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:3-4 [Journal ] Conference Reports. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:5-0 [Journal ] Panel Summaries. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:6-8 [Journal ] Dado Banatao: Profile of a Silicon Valley Entrepreneur. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:9-15 [Journal ] Robin Saxby , Peter Harrod Test in the Emerging Intellectual Property Business. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:16-18 [Journal ] Bruce F. Cockburn , Fabrizio Lombardi , Fred J. Meyer Guest Editors' Introduction: DRAM Architecture and Testing. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:19-21 [Journal ] Michael Redeker , Bruce F. Cockburn , Duncan G. Elliott Fault Models and Tests for a 2-Bit-per-Cell MLDRAM. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:22-31 [Journal ] Duncan G. Elliott , Michael Stumm , W. Martin Snelgrove , Christian Cojocaru , Robert McKenzie Computational RAM: Implementing Processors in Memory. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:32-41 [Journal ] Bruce Millar , Peter Gillingham Two High-Bandwidth Memory Bus Structures. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:42-52 [Journal ] Shinji Miyano , Katsuhiko Sato , Kenji Numata Universal Test Interface for Embedded-DRAM Testing. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:53-58 [Journal ] Chih-Tsun Huang , Jing-Reng Huang , Chi-Feng Wu , Cheng-Wen Wu , Tsin-Yuan Chang A Programmable BIST Core for Embedded DRAM. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:59-70 [Journal ] Kenneth M. Butler Estimating the Economic Benefits of DFT. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:71-79 [Journal ] A D&T Roundtable: Online Test. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:80-86 [Journal ] Mukund Modi P1532, WAVES, and a New Initiative. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:88-89 [Journal ] DATC Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:93-0 [Journal ] TTTC Newsletter. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:94-95 [Journal ] Al Crouch The DFT Psychic Network. [Citation Graph (0, 0)][DBLP ] IEEE Design & Test of Computers, 1999, v:16, n:1, pp:96-0 [Journal ]