The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Design & Test of Computers
1999, volume: 16, number: 1

  1. Yervant Zorian
    Focus on DRAMs. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:1-0 [Journal]

  2. News. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:3-4 [Journal]

  3. Conference Reports. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:5-0 [Journal]

  4. Panel Summaries. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:6-8 [Journal]

  5. Dado Banatao: Profile of a Silicon Valley Entrepreneur. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:9-15 [Journal]
  6. Robin Saxby, Peter Harrod
    Test in the Emerging Intellectual Property Business. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:16-18 [Journal]
  7. Bruce F. Cockburn, Fabrizio Lombardi, Fred J. Meyer
    Guest Editors' Introduction: DRAM Architecture and Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:19-21 [Journal]
  8. Michael Redeker, Bruce F. Cockburn, Duncan G. Elliott
    Fault Models and Tests for a 2-Bit-per-Cell MLDRAM. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:22-31 [Journal]
  9. Duncan G. Elliott, Michael Stumm, W. Martin Snelgrove, Christian Cojocaru, Robert McKenzie
    Computational RAM: Implementing Processors in Memory. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:32-41 [Journal]
  10. Bruce Millar, Peter Gillingham
    Two High-Bandwidth Memory Bus Structures. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:42-52 [Journal]
  11. Shinji Miyano, Katsuhiko Sato, Kenji Numata
    Universal Test Interface for Embedded-DRAM Testing. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:53-58 [Journal]
  12. Chih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu, Cheng-Wen Wu, Tsin-Yuan Chang
    A Programmable BIST Core for Embedded DRAM. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:59-70 [Journal]
  13. Kenneth M. Butler
    Estimating the Economic Benefits of DFT. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:71-79 [Journal]

  14. A D&T Roundtable: Online Test. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:80-86 [Journal]
  15. Mukund Modi
    P1532, WAVES, and a New Initiative. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:88-89 [Journal]

  16. DATC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:93-0 [Journal]

  17. TTTC Newsletter. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:94-95 [Journal]
  18. Al Crouch
    The DFT Psychic Network. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:1, pp:96-0 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002