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Journals in DBLP

Electr. Notes Theor. Comput. Sci.
2005, volume: 128, number: 3

  1. Lubos Brim, Martin Leucker
    Preface. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:1-2 [Journal]
  2. Víctor A. Braberman, Alfredo Olivero, Fernando Schapachnik
    On-the-fly Workload Prediction and Redistribution in the Distributed Timed Model Checker Zeus. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:3-18 [Journal]
  3. Rahul Kumar, Eric G. Mercer
    Load Balancing Parallel Explicit State Model Checking. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:19-34 [Journal]
  4. Simona Orzan, Jaco van de Pol, Miguel Valero Espada
    A State Space Distribution Policy Based on Abstract Interpretation. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:35-45 [Journal]
  5. Christophe Joubert, Radu Mateescu
    Distributed On-the-Fly Equivalence Checking. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:47-62 [Journal]
  6. Lubos Brim, Ivana Cerná, Pavel Moravec 0002, Jirí Simsa
    Distributed Partial Order Reduction of State Spaces. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:63-74 [Journal]
  7. Yulik Feldman, Nachum Dershowitz, Ziyad Hanna
    Parallel Multithreaded Satisfiability Solver: Design and Implementation. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:75-90 [Journal]
  8. Fredrik Holmén, Martin Leucker, Marcus Lindström
    UppDMC: A Distributed Model Checker for Fragments of the mu-Calculus. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:91-105 [Journal]
  9. Cornelia P. Inggs, Howard Barringer
    CTL ast Model Checking on a Shared-Memory Architecture. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:107-123 [Journal]
  10. Martin Lange, Hans-Wolfgang Loidl
    Parallel and Symbolic Model Checking for Fixpoint Logic with Chop. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2005, v:128, n:3, pp:125-138 [Journal]
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