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Journals in DBLP

Formal Methods in System Design
1998, volume: 13, number: 2

  1. Deepak Kapur, Mahadevan Subramaniam
    Mechanical Verification of Adder Circuits using Rewrite Rule Laboratory. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1998, v:13, n:2, pp:127-158 [Journal]
  2. Sofiène Tahar, Ramayya Kumar
    A Practical Methodology for the Formal Verification of RISC Processors. [Citation Graph (0, 0)][DBLP]
    Formal Methods in System Design, 1998, v:13, n:2, pp:159-225 [Journal]
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