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Journals in DBLP

IBM Journal of Research and Development
2004, volume: 48, number: 3-4

  1. Michael Desens
    Message from the Vice President, Systems Hardware Development, IBM Systems and Technology Group. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:292-0 [Journal]
  2. Rolf Schmidt
    Preface. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:293-294 [Journal]
  3. Timothy J. Slegel, Erwin Pfeffer, Jeffrey A. Magee
    The IBM eServer z990 microprocessor. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:295-310 [Journal]
  4. Guenter Gerwig, Holger Wetter, Eric M. Schwarz, Juergen Haess, Christopher A. Krygowski, Bruce M. Fleischer, Michael Kroener
    The IBM eServer z990 floating-point unit. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:311-322 [Journal]
  5. Pak-kin Mak, Gary E. Strait, Michael A. Blake, Kevin W. Kark, Vesselina K. Papazova, A. E. (Rick) Seigler, Gary A. Van Huben, Liyong Wang, George C. Wellwood
    Processor subsystem interconnect architecture for a large symmetric multiprocessing system. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:323-338 [Journal]
  6. Tobias Webel, Thomas E. Gilbert, Dietmar Schmunkamp
    Run-control migration from single book to multibooks. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:339-346 [Journal]
  7. Dean G. Bair, Steven M. German, William D. Wollyung, Edward J. Kaminski Jr., James Schafer, Michael P. Mullen, William J. Lewis, Rebecca Wisniewski, Joerg Walter, Steven Mittermaier, Visda Vokhshoori, Robert J. Adkins, Michael Halas, Thomas Ruane, Ursel Hahn
    Functional verification of the z990 superscalar, multibook microprocessor complex. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:347-366 [Journal]
  8. Hans-Werner Anderson, Hans Kriese, Wolfgang Roesner, Klaus-Dieter Schubert
    Configurable system simulation model build comprising packaging design data. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:367-378 [Journal]
  9. Thomas-Michael Winkel, Wiren D. Becker, Hubert Harrer, Harald Pross, Dierk Kaller, Bernd Garben, Bruce J. Chamberlin, Scott A. Kuppinger
    First- and second-level packaging of the z990 processor cage. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:379-394 [Journal]
  10. Juan C. Parrilla, Frank E. Bosco, John S. Corbin, John J. Loparco, Prabjit Singh, John G. Torok
    Packaging the IBM eServer z990 central electronic complex. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:395-408 [Journal]
  11. Gary F. Goth, Daniel J. Kearney, Udo Meyer, Donald W. Porter
    Hybrid cooling with cycle steering in the IBM eServer z990. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:409-424 [Journal]
  12. Lisa Cranton Heller, Mark S. Farrell
    Millicode in an IBM zSeries processor. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:425-434 [Journal]
  13. Christine Axnix, Eberhard Engler, Stefan Hegewald, Thomas Hesmer, Martin Kuenzel, Friedrich Michael Welter
    z990 NetMessage-protocol-based processor to support element communication interface. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:435-448 [Journal]
  14. Edward W. Chencinski, Michael J. Becht, Tim E. Bubb, Carolynn G. Burwick, Juergen Haess, Markus M. Helms, Joseph M. Hoke, Thomas Schlipf, Jeffrey M. Turner, Hartmut Ulland, Manfred H. Walz, Carl H. Whitehead, Gerhard Zilles
    The structure of chips and links comprising the IBM eServer z990 I/O subsystem. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:449-460 [Journal]
  15. Bodo Hoppe, Bridgette Arthur-Mensah, Edward W. Chencinski, Sabina Joseph, Haresh Kumar, Jose F. Silverio
    Functional verification of a frequency-programmable switch chip with asynchronous clock sections. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:461-474 [Journal]
  16. Todd W. Arnold, Leendert van Doorn
    The IBM PCIXCC: A new cryptographic coprocessor for the IBM eServer. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:475-488 [Journal]
  17. Les W. Wyman, Harry M. Yudenfriend, John S. Trotter, Kenneth J. Oakes
    Multiple-logical-channel subsystems: Increasing zSeries I/O scalability and connectivity. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:489-506 [Journal]
  18. Gerhard Banzhaf, Frank W. Brice, Giles R. Frazier, Jeffrey P. Kubala, Thomas B. Mathias, Volker Sameske
    SCSI initial program loading for zSeries. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:507-518 [Journal]
  19. Myron L. Fair, Christopher R. Conklin, Scott B. Swaney, Patrick J. Meaney, William J. Clarke, Luiz C. Alves, Indravadan N. Modi, Fritz Freier, Wolfgang Fischer, Norman E. Weber
    Reliability, availability, and serviceability (RAS) of the IBM eServer z990. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:519-534 [Journal]
  20. Ira G. Siegel, Beth A. Glendening, Jeffrey P. Kubala
    Logical partition mode physical resource management on the IBM eServer z990. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:535-542 [Journal]
  21. Wolfgang Gellerich, Torsten Hendel, Rudolf Land, Helge Lehmann, Michael Mueller, Peter H. Oden, Hartmut Penner
    The GNU 64-bit PL8 compiler: Toward an open standard environment for firmware development. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:543-556 [Journal]
  22. Stefan Koerner, Rainer Bawidamann, Wolfgang Fischer, Ulrich Helmich, Daniel Klodt, Brian K. Tolan, Paul Wojciak
    The z990 first error data capture concept. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:557-568 [Journal]
  23. Klaus-Dieter Schubert, Edward C. McCain, Hermann Pape, Karin Rebmann, Patrick M. West, Ralf Winkelmann
    Accelerating system integration by enhancing hardware, firmware, and co-simulation. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:569-582 [Journal]
  24. Michael Stetter, Joachim von Buttlar, Ping T. (Danny) Chan, Dietmar Decker, Herwig Elfering, Paul M. Gioquindo, Thomas Hess, Stefan Koerner, Andreas Kohler, Heinrich Lindner, Karlo Petri, Mooheng Zee
    IBM eServer z990 improvements in firmware simulation. [Citation Graph (0, 0)][DBLP]
    IBM Journal of Research and Development, 2004, v:48, n:3-4, pp:583-594 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
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for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002