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Journals in DBLP

Integration
2003, volume: 36, number: 4

  1. Francisco V. Fernández
    Analog and mixed-signal IC design and design methodologies. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:157-159 [Journal]
  2. Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, José L. Ausín
    1-V quasi constant-gm input/output rail-to-rail CMOS op-amp. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:161-174 [Journal]
  3. Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei
    Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:175-189 [Journal]
  4. Massimo Alioto, Rosario Mita, Gaetano Palumbo
    Performance evaluation of the low-voltage CML D-latch topology. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:191-209 [Journal]
  5. Patrick Quinn, Maxim Pribytko
    Capacitor matching insensitive algorithmic ADC requiring no calibrations. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:211-228 [Journal]
  6. Oscar Guerra, Carlos M. Domínguez-Matas, Sara Escalera, José M. García-González, Gustavo Liñán, Rocio del Río, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez
    A modem in CMOS technology for data communication on the low-voltage power line. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:229-236 [Journal]
  7. Nuttorn Jangkrajarng, Sambuddha Bhattacharya, Roy Hartono, C.-J. Richard Shi
    IPRAIL - intellectual property reuse-based analog IC layout automation. [Citation Graph (0, 0)][DBLP]
    Integration, 2003, v:36, n:4, pp:237-262 [Journal]
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