Journals in DBLP
Integration Matthias Gries Methods for evaluating and covering the design space during early design development. [Citation Graph (0, 0)][DBLP ] Journal ] Martin Margala , Hongfan Wang New approach to design for reusability of arithmetic cores in systems-on-chip. [Citation Graph (0, 0)][DBLP ] Journal ] Magdy A. El-Moursy , Eby G. Friedman Optimum wire sizing of RLC interconnect with repeaters . [Citation Graph (0, 0)][DBLP ] Journal ] Falk Roewer , Ulrich Kleine , Klaus-Eberhard Salzwedel , Felix Mednikov , Chhrisitan Pfaffinger , Martin Sellen A programmable inductive position sensor interface circuit. [Citation Graph (0, 0)][DBLP ] Journal ] Guang-Ming Wu , Mango Chia-Tso Chao , Yao-Wen Chang A clustering- and probability-based approach for time-multiplexed FPGA partitioning. [Citation Graph (0, 0)][DBLP ] Journal ] Soumen Maity , Amiya Nayak , Bimal K. Roy On characterization of catastrophic faults in two-dimensional VLSI arrays. [Citation Graph (0, 0)][DBLP ] Journal ] Abdoul Rjoub , Odysseas G. Koufopavlou Multithreshold voltage low-swing/low-voltage techniques in logic gates. [Citation Graph (0, 0)][DBLP ] Journal ] Ali Ziya Alkar , Remziye Sönmez A hardware version of the RSA using the Montgomery's algorithm with systolic arrays. [Citation Graph (0, 0)][DBLP ] Journal ] Robertas Damasevicius , Vytautas Stuikys Application of the object-oriented principles for hardware and embedded system design. [Citation Graph (0, 0)][DBLP ] Journal ] 