Journals in DBLP

Integration
2001, volume: 31, number: 1

1. Jiang Hu, Sachin S. Sapatnekar
   A survey on multi-net global routing for integrated circuits. [Citation Graph (0, 0)][DBLP]
   Integration, 2001, v:31, n:1, pp:1-49 [Journal]
   
2. Rolf Drechsler, Wolfgang Günther
   History-based dynamic BDD minimization. [Citation Graph (0, 0)][DBLP]
   Integration, 2001, v:31, n:1, pp:51-63 [Journal]
   
3. Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu
   Floorplanning with abutment constraints based on corner block list. [Citation Graph (0, 0)][DBLP]
   Integration, 2001, v:31, n:1, pp:65-77 [Journal]
   
4. Luca Fanucci, Sergio Saponara, Lorenzo Bertini
   A parametric VLSI architecture for video motion estimation. [Citation Graph (0, 0)][DBLP]
   Integration, 2001, v:31, n:1, pp:79-100 [Journal]