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Journals in DBLP

Integration
1997, volume: 23, number: 2

  1. Michael Braun, Guy Even, Thomas Walle
    Mirroring: a technique for pipelining semi-systolic and systolic arrays. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:2, pp:115-130 [Journal]
  2. C. A. J. van Eijk
    A BDD-based verification method for large synthesized circuits. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:2, pp:131-149 [Journal]
  3. Joseph L. Ganley
    Accuracy and fidelity of fast net length estimates. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:2, pp:151-155 [Journal]
  4. Shung-Chih Chen, Jer-Min Jou
    Serial diagnostic fault simulation for synchronous sequential circuits. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:2, pp:157-170 [Journal]
  5. Kenneth J. Schultz
    Content-addressable memory core cells A survey. [Citation Graph (0, 0)][DBLP]
    Integration, 1997, v:23, n:2, pp:171-188 [Journal]
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