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Journals in DBLP

Integration
1999, volume: 27, number: 1

  1. S. Ramanathan, V. Visvanathan
    Low-power pipelined LMS adaptive filter architectures with minimal adaptation delay1. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:27, n:1, pp:1-32 [Journal]
  2. Janett Mohnke, Paul Molitor, Sharad Malik
    Establishing latch correspondence for sequential circuits using distinguishing signatures. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:27, n:1, pp:33-46 [Journal]
  3. Joseph L. Ganley, James P. Cohoon
    Provably good moat routing. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:27, n:1, pp:47-56 [Journal]
  4. Tetsushi Koide, Shin'ichi Wakabayashi
    A timing-driven floorplanning algorithm with the Elmore delay model for building block layout. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:27, n:1, pp:57-76 [Journal]
  5. Dimitri Kagaris, Spyros Tragoudas
    Maximum weighted independent sets on transitive graphs and applications1. [Citation Graph (0, 0)][DBLP]
    Integration, 1999, v:27, n:1, pp:77-86 [Journal]
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