The SCEAS System
Navigation Menu

Journals in DBLP

Integration
2007, volume: 40, number: 1

  1. Nadia Nedjah, Luiza de Macedo Mourelle
    Embedded cryptographic hardware. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:1-2 [Journal]
  2. Akashi Satoh, Tadanobu Inoue
    ASIC-hardware-focused comparison for hash functions MD5, RIPEMD-160, and SHS. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:3-10 [Journal]
  3. T. S. Ganesh, Michael T. Frederick, T. S. B. Sudarshan, Arun K. Somani
    Hashchip: A shared-resource multi-hash function processor architecture on FPGA. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:11-19 [Journal]
  4. François-Xavier Standaert, Gilles Piret, Gaël Rouvroy, Jean-Jacques Quisquater
    FPGA implementations of the ICEBERG block cipher. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:20-27 [Journal]
  5. Tim Kerins, William P. Marnane, Emanuel M. Popovici
    Versatile hardware architectures for GF(pm) arithmetic in public key cryptography. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:28-35 [Journal]
  6. Nadia Nedjah, Luiza de Macedo Mourelle
    Efficient and secure cryptographic systems based on addition chains: Hardware design vs. software/hardware co-design. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:36-44 [Journal]
  7. Alireza Hodjat, Lejla Batina, David Hwang, Ingrid Verbauwhede
    HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:45-51 [Journal]
  8. Eric Peeters, François-Xavier Standaert, Jean-Jacques Quisquater
    Power and electromagnetic analysis: Improved model, consequences and comparisons. [Citation Graph (0, 0)][DBLP]
    Integration, 2007, v:40, n:1, pp:52-60 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002