David S. Wise Representing Matrices as Quadtrees for Parallel Processors. [Citation Graph (0, 0)][DBLP] Inf. Process. Lett., 1985, v:20, n:4, pp:195-199 [Journal]
J. Mark Keil Finding Hamiltonian Circuits in Interval Graphs. [Citation Graph (0, 0)][DBLP] Inf. Process. Lett., 1985, v:20, n:4, pp:201-206 [Journal]
W. J. Van Gils How to Cope with Faulty Processors in a Completely Connected Network of Communicating Processors. [Citation Graph (0, 0)][DBLP] Inf. Process. Lett., 1985, v:20, n:4, pp:207-213 [Journal]