The SCEAS System
Navigation Menu

Journals in DBLP

Journal of Systems Architecture
1997, volume: 43, number: 1-5

  1. K. P. Judmann
    EUROMICRO 1995 - Short Contributions. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:1-5 [Journal]
  2. Stefan A. Kühn, Michael B. Kleiner, Werner Weber
    Multiparallel systolic arrays for multidimensional FFT-architectures on 3D-VLSI. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:7-14 [Journal]
  3. Alberto Ferreira de Souza, Edil S. Tavares Fernandes, Andrew Wolfe
    On the balance of VLIW architectures. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:15-22 [Journal]
  4. István Vassányi
    FPGAs and cellular algorithms: Two implementation examples. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:23-26 [Journal]
  5. Marek Tudruj
    Dynamically reconfigurable heterogeneous multi-processor systems with transputer-controlled communication. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:27-32 [Journal]
  6. José M. Fernández, Félix Moreno, Juan M. Meneses
    An approach to the design of RISC core processors for VLSI embedded systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:33-37 [Journal]
  7. Simon A. Trainis
    Modelling the hardware cost of full register bypassing in a multiple instruction issue processor. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:39-46 [Journal]
  8. Miroslav Svéda
    Design method, fail-stop safety model, and embedded application. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:47-57 [Journal]
  9. A. D. Hudson, D. A. Sanders, H. Golding, G. E. Tewkesbury, H. Cawte
    Aspects of an expert design system for the wastewater treatment industry. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:59-65 [Journal]
  10. I. J. Stott, D. A. Sanders, M. J. Goodwin
    A software algorithm for the intelligent mixing of inputs to a tele-operated vehicle. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:67-72 [Journal]
  11. M. J. Goodwin, D. A. Sanders, G. A. Poland, I. J. Stott
    Navigational assistance for disabled wheelchair-users. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:73-79 [Journal]
  12. Gregor Vrecko, Zmago Brezocnik, Tatjana Kapus, Bogomir Horvat, Andrej Duh
    Microcomputer unit for control of distributed devices over computer networks. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:81-85 [Journal]
  13. Erik Stoy, Zebo Peng
    Inter-domain movement of functionality as a repartitioning strategy for hardware/software co-design. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:87-98 [Journal]
  14. Karl M. Göschka
    Generation of firmwarecompilers. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:99-109 [Journal]
  15. Byung-gi Kim, Hoon Chang, Jung Wan Cho
    Methodology for ensuring high reliability of VLSI systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:111-117 [Journal]
  16. Jordi Riera, Lluis Ribas, A. Josep Velasco, Jordi Carrabina
    Deriving cost functions from cell libraries and real ICs to allow real area-power-delay trade-off in early stages of logic synthesis. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:119-122 [Journal]
  17. Juraj Povazanec, Vladislav Musil
    Fault and test-process modelling for integrated circuits. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:123-127 [Journal]
  18. Manuel L. Anido, C. E. T. Oliveira, Vladimir C. Alves
    An environment to perform functional tests on boards and integrated circuits. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:129-134 [Journal]
  19. Gabriella Dodero, R. Valia
    Pipelined programming in PVM. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:135-141 [Journal]
  20. Miroslaw Thor
    A multi-thread approach reducing program execution time in a heterogeneous reconfigurable multi-processor architecture. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:143-153 [Journal]
  21. Doron Darmon, Helnye Azaria
    Asynchronous Process Simulator for Parallel Systems (APSPS) 1. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:155-162 [Journal]
  22. Ferenc Vajda
    Implementation issues of the Hough Transform. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:163-165 [Journal]
  23. Giulio Iannello, Stefano Russo
    PVM communication performance over an ATM MAN. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:167-173 [Journal]
  24. Donghee Lee, Youngtack Jin, Yookun Cho
    Fast networking based on the STREAMS mechanism with fast module scheduling. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:175-184 [Journal]
  25. Youngsong Mun, Kyung-Sun Min, Youngsik Kim
    Performance evaluation of switching networks. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:185-188 [Journal]
  26. Joshua Etkin
    Language-based communication protocols for distributed systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:189-191 [Journal]
  27. Gianfranco Ciccarella, Giuseppe Donatelli, Roberto Piermarini
    A nonlinear predistortion technique for radio channels: Algorithms and implementation problems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:193-198 [Journal]
  28. Jürgen Lampe
    A tool for syntax directed software design. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:199-202 [Journal]
  29. Viljem Zumer, Nikolaj Korbar, Marjan Mernik
    Automatic implementation of programming languages using object oriented approach. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:203-210 [Journal]
  30. Jakob Axelsson
    A portable model for predicting the size and execution time of programs. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:211-213 [Journal]
  31. Waldemar Wieczerzycki
    Advanced versioning mechanisms supporting CSCW environments. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:215-227 [Journal]
  32. George Samaras, Andrew Citron, Ajay D. Kshemkalyani
    Reconciling chained and unchained transactional support for distributed systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:229-243 [Journal]
  33. Taekyung Byun, Songchun Moon
    Nonblocking two-phase commit protocol to avoid unnecessary transaction abort for distributed systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:245-254 [Journal]
  34. Youngkon Lee, Songchun Moon
    Dynamic replication control scheme using logical configuration information: DYRECT. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:255-266 [Journal]
  35. Wonsup Lee, Haengrae Cho, Songchun Moon
    Group-oriented catalog allocation in heterogeneous distributed database systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:267-276 [Journal]
  36. Hyeokman Kim, Sukho Lee, Hyoung-Joo Kim
    A cost model for sort-domain traversal strategy in object-oriented databases. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:277-283 [Journal]
  37. Hwan-Seung Yong, Sukho Lee
    A storage structure for nested relations using signatures. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:285-290 [Journal]
  38. Krzysztof Goczyla
    Exploiting class hierarchy for effective parallelisation of processing in object-oriented database systems. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:291-295 [Journal]
  39. Kisoo Han, Songchun Moon
    Group checkpointing scheme for partition failure recovery in mobile database systems: GCS/MD. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:297-305 [Journal]
  40. Hyung-Il Choi, Gye-Young Kim
    Motion interpretation by analyzing difference images. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:307-316 [Journal]
  41. Massimo Bertozzi, Alberto Broggi, Stefano Castelluccio
    A real-time oriented system for vehicle detection. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:317-325 [Journal]
  42. S. L. Chen, E-ren Chuang, W. S. Hsieh
    VISUAL: An object oriented language for image understanding. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:327-335 [Journal]
  43. Desmond Phillips, Alan Purvis, Simon Johnson
    On an efficient VLSI architecture for the multirate additive synthesis of musical tones. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:337-340 [Journal]
  44. Andrew M. Tyrrell, Tim S. Brookes, David M. Howard
    T9000 and T800 transputers: A real-time application. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:341-344 [Journal]
  45. Mohamed Ould-Khaoua, Reza Sotudeh
    Performance evaluation of hypermeshes and meshes with wormhole routing. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:345-353 [Journal]
  46. Youngsik Kim, Oh-Young Kwon, Tack-Don Han, Youngsong Mun
    Design and performance analysis of the Practical Fat Tree Network using a butterfly network. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:355-363 [Journal]
  47. Dragana Milutinovic
    Mapping of interconnection networks for parallel processing onto the advanced sea-of-gates VLSI. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 1997, v:43, n:1-5, pp:365-370 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002