Yi-Min Wang Memory latency consideration for load sharing on heterogeneous network of workstations. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2006, v:52, n:1, pp:13-24 [Journal]
Mehran Rezaei, Krishna M. Kavi Intelligent memory manager: Reducing cache pollution due to memory management functions. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2006, v:52, n:1, pp:41-55 [Journal]
N. Chaki, S. Bhattacharya Performance analysis of multistage interconnection networks with a new high-level net model. [Citation Graph (0, 0)][DBLP] Journal of Systems Architecture, 2006, v:52, n:1, pp:56-70 [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP