Journals in DBLP
IEEE Micro 2005, volume: 25, number: 6
Pradip Bose Designing microprocessors with robust functionality and performance. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:5- [Journal ] Shane Greenstein Wireless access and electrical markets: Becoming similar? [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:6-7 [Journal ] Sarita V. Adve , Pia Sanda Guest Editors' Introduction: Reliability-Aware Microarchitecture. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:8-9 [Journal ] Shekhar Y. Borkar Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:10-16 [Journal ] Ravishankar K. Iyer , Nithin Nakka , Zbigniew Kalbarczyk , Subhasish Mitra Recent Advances and New Avenues in Hardware-Level Reliability Support. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:18-29 [Journal ] Giacinto Paolo Saggese , Nicholas J. Wang , Zbigniew Kalbarczyk , Sanjay J. Patel , Ravishankar K. Iyer An Experimental Study of Soft Errors in Microprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:30-39 [Journal ] Zhijian Lu , John Lach , Mircea R. Stan , Kevin Skadron Improved Thermal Management with Reliability Banking. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:40-49 [Journal ] Brian T. Gold , Jangwoo Kim , Jared C. Smolens , Eric S. Chung , Vasileios Liaskovitis , Eriko Nurvitadhi , Babak Falsafi , James C. Hoe , Andreas Nowatzyk TRUSS: A Reliable, Scalable Server Architecture. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:51-59 [Journal ] M. Wasiur Rashid , Edwin J. Tan , Michael C. Huang , David H. Albonesi Power-Efficient Error Tolerance in Chip Multiprocessors. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:60-70 [Journal ] Daniel L. Stasiak , Rajat Chaudhry , Dennis Cox , Stephen D. Posluszny , James D. Warnock , Steve Weitzel , Dieter F. Wendel , Michael Wang Cell Processor Low-Power Design Methodology. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:71-78 [Journal ] Philip G. Emma Writing the claims for a patent. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:79-81 [Journal ] Richard Mateosian Year-end cleanup. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:82-84 [Journal ] Richard Stern Transnational electronic systems and patent infringement. [Citation Graph (0, 0)][DBLP ] IEEE Micro, 2005, v:25, n:6, pp:85-88 [Journal ]