Journals in DBLP

IEEE Micro
2003, volume: 23, number: 6

1. 
   Letters. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:5- [Journal]
   
2. Charles R. Moore, Kevin W. Rudd, Ruby B. Lee, Pradip Bose
   Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:8-10 [Journal]
   
3. Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan
   Checkpoint Processing and Recovery: An Efficient, Scalable Alternative to Reorder Buffers. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:11-19 [Journal]
   
4. Onur Mutlu, Jared Stark, Chris Wilkerson, Yale N. Patt
   Runahead Execution: An Effective Alternative to Large Instruction Windows. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:20-25 [Journal]
   
5. Michael K. Chen, Kunle Olukotun
   The Jrpm System for Dynamically Parallelizing Sequential Java Programs. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:26-35 [Journal]
   
6. Christoforos E. Kozyrakis, David A. Patterson
   Scalable Vector Processors for Embedded Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:36-45 [Journal]
   
7. Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore
   Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:46-51 [Journal]
   
8. Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakumar Velusamy, Karthik Sankaranarayanan, David Tarjan
   Temperature-Aware Computer Systems: Opportunities and Challenges. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:52-61 [Journal]
   
9. Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steve Dropsho, Sandhya Dwarkadas, Michael L. Scott
   Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor. [Citation Graph (0, 0)][DBLP]
   IEEE Micro, 2003, v:23, n:6, pp:62-68 [Journal]
   
10. Shubhendu S. Mukherjee, Chris Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin
    Measuring Architectural Vulnerability Factors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:70-75 [Journal]
    
11. Mohamed A. Gomaa, Chad Scarbrough, T. N. Vijaykumar, Irith Pomeranz
    Transient-Fault Recovery for Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:76-83 [Journal]
    
12. Timothy Sherwood, Erez Perelman, Greg Hamerly, Suleyman Sair, Brad Calder
    Discovering and Exploiting Program Phases. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:84-93 [Journal]
    
13. Alaa R. Alameldeen, David A. Wood
    Addressing Workload Variability in Architectural Simulations. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:94-98 [Journal]
    
14. Changkyu Kim, Doug Burger, Stephen W. Keckler
    Nonuniform Cache Architectures for Wire-Delay Dominated On-Chip Caches. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:99-107 [Journal]
    
15. Milo M. K. Martin, Mark D. Hill, David A. Wood
    Token Coherence: A New Framework for Shared-Memory Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:108-116 [Journal]
    
16. Ravi Rajwar, James A. Goodman
    Transactional Execution: Toward Reliable, High-Performance Multithreading. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:117-125 [Journal]
    
17. José F. Martínez, Josep Torrellas
    Speculative Synchronization: Programmability and Performance for Parallel Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2003, v:23, n:6, pp:126-134 [Journal]