The SCEAS System
Navigation Menu

Journals in DBLP

IEEE Micro
2000, volume: 20, number: 6


  1. New Products. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:- [Journal]

  2. Micro News. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:2-3 [Journal]
  3. Richard H. Stern
    Napster: A Walking Copyright Infringement? [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:4-5 [Journal]
  4. Shane M. Greenstein
    PCs, the Internet, and You. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:6-7 [Journal]
  5. Gary S. Robinson
    Making Standards Simple. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:8-9 [Journal]
  6. Ken Sakamura
    Guest Editor's Introduction: Stepping Into the Future. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:10-11 [Journal]
  7. Marc Tremblay, Jeffrey Chan, Shailender Chaudhry, Andrew W. Conigliaro, Shing Sheung Tse
    The MAJC Architecture: A Synthesis of Parallelism and Scalability. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:12-25 [Journal]
  8. David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook
    Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:26-44 [Journal]
  9. Chris Herring
    Microprocessors, Microcontrollers, and Systems in the New Millennium. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:45-51 [Journal]
  10. Gene Frantz
    Digital Signal Processor Trends. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:52-59 [Journal]
  11. Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M. Lavery, Wei Li, Chu-Cheow Lim, John Ng, David C. Sehr
    An Advanced Optimizer for the IA-64 Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:60-68 [Journal]
  12. Eric Dahlen, Jennifer Gustin, Susan Meredith, Doug Moran
    The 82460GX Sever/Workstation Chip Set. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:69-75 [Journal]
  13. Humayun Khalid
    Validating Trace-Driven Microarchitectural Simulations. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:76-82 [Journal]
  14. Tadao Nakamura
    Cool Chips III. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:83-84 [Journal]

  15. Product Summary. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2000, v:20, n:6, pp:96- [Journal]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002