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Journals in DBLP
IEEE Micro 2004, volume: 24, number: 6
- Pradip Bose
Computer architecture research: Shifting priorities and newer challenges. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:5- [Journal]
- Shane Greenstein
Canaries, whips, and sails. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:6-7 [Journal]
- David H. Albonesi
Guest Editor's Introduction: Micro's Top Picks from Microarchitecture Conferences. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:8-9 [Journal]
- Dan Ernst, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner
Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:10-20 [Journal]
- Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas Nowatzyk
Fingerprinting: Bounding Soft-Error-Detection Latency and Bandwidth. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:22-29 [Journal]
- Christopher Weaver, Joel S. Emer, Shubhendu S. Mukherjee, Steven K. Reinhardt
Reducing the Soft-Error Rate of a High-Performance Microprocessor. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:30-37 [Journal]
- Xiaodong Li, Zhenmin Li, Pin Zhou, Yuanyuan Zhou, Sarita V. Adve, Sanjeev Kumar
Performance-Directed Energy Management for Storage Systems. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:38-49 [Journal]
- Pin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou, Josep Torrellas
iWatcher: Simple, General Architectural Support for Software Debugging. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:50-56 [Journal]
- Brian A. Fields, Rastislav Bodík, Mark D. Hill, Chris J. Newburn
Interaction Cost: For When Event Counts Just Don't Add Up. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:57-61 [Journal]
- Srikanth T. Srinivasan, Ravi Rajwar, Haitham Akkary, Amit Gandhi, Michael Upton
Continual Flow Pipelines: Achieving Resource-Efficient Latency Tolerance. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:62-73 [Journal]
- Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen
Helper Threads via Virtual Multithreading. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:74-82 [Journal]
- Ronny Krashinsky, Christopher Batten, Mark Hampton, Steve Gerding, Brian Pharris, Jared Casper, Krste Asanovic
The Vector-Thread Architecture. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:84-90 [Journal]
- Lance Hammond, Brian D. Carlstrom, Vicky Wong, Michael K. Chen, Christos Kozyrakis, Kunle Olukotun
Transactional Coherence and Consistency: Simplifying Parallel Hardware and Software. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:92-103 [Journal]
- Jaehyuk Huh, Doug Burger, Jichuan Chang, Gurindar S. Sohi
Speculative Incoherent Cache Protocols. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:104-109 [Journal]
- Harold W. Cain, Mikko H. Lipasti
Memory Ordering: A Value-Based Approach. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:110-117 [Journal]
- Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler
Scalable Hardware Memory Disambiguation for High-ILP Processors. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:118-127 [Journal]
Micro News. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:129- [Journal]
- Richard Mateosian
Micro Review: More on old themes. [Citation Graph (0, 0)][DBLP] IEEE Micro, 2004, v:24, n:6, pp:133-134 [Journal]
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