Journals in DBLP

IEEE Trans. Computers
1981, volume: 30, number: 8

1. Jerry R. Van Aken, Gregory L. Zick
   The Expression Processor: A Pipelined, Multiple-Processor Architecture. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:525-536 [Journal]
   
2. Gian Carlo Bongiovanni, C. K. Wong
   Tree Search in Major/Minor Loop Magnetic Bubble Memories. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:537-545 [Journal]
   
3. Suchai Thanawastien, Victor P. Nelson
   Interference Analysis of Shuffle/Exchange Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:545-556 [Journal]
   
4. Hideo Fujiwara
   On Closedness and Test Complexity of Logic Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:556-562 [Journal]
   
5. Thirumalai Sridhar, John P. Hayes
   A Functional Approach to Testing Bit-Sliced Microprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:563-571 [Journal]
   
6. Isao Shirakawa, Noboru Okuda, Takashi Harada, Sadahiro Tani, Hiroshi Ozaki
   A Layout System for the Random Logic Portion of an MOS LSI Chip. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:572-581 [Journal]
   
7. Vishwani D. Agrawal
   An Information Theoretic Approach to Digital Fault Testing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:582-587 [Journal]
   
8. James R. Armstrong, F. Gail Gray
   Fault Diagnosos in a Boolean n Cube Array of Microprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:587-590 [Journal]
   
9. Jon T. Butler
   Speed-Efficiency-Complexity Tradeoffs in Universal Diagnosis Algorithms. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1981, v:30, n:8, pp:590-596 [Journal]
   
10. Alan B. Hayes
    Stored State Asynchronous Sequential Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:596-600 [Journal]
    
11. Yashwant K. Malaiya, Stephen Y. H. Su
    Reliability Measure of Hardware Redundancy Fault-Tolerant Digital Systems with Intermittent Faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:600-604 [Journal]
    
12. George Markowsky
    Syndrome-Testability Can be Achieved by Circuit Modification. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:604-606 [Journal]
    
13. Jacob Savir
    Syndrome-Testing of ``Syndrome-Untestable'' Combinational Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:606-608 [Journal]
    
14. Jack Worlton
    Comments on ``Parallelism and Representation Problems in Distributed Systems''. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:608-609 [Journal]
    
15. Jim B. Surjaatmadja
    An Algebra for Switching Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1981, v:30, n:8, pp:609-613 [Journal]