Journals in DBLP

IEEE Trans. Computers
1994, volume: 43, number: 5

1. Terunao Soneoka, Toshihide Ibaraki
   Logically Instantaneous Message Passing in Asynchronous Distributed Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:513-527 [Journal]
   
2. Chao-Ju Hou, Kang G. Shin
   Incorporation of Optimal Timeouts into Distributed Real-Time Load Sharing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:528-547 [Journal]
   
3. Sundeep Prakash, Yann-Hang Lee, Theodore Johnson
   A Nonblocking Algorithm for Shared Queues Using Compare-and-Swap. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:548-559 [Journal]
   
4. Douglas W. Clark, Lih-Jyh Weng
   Maximal and Near-Maximal Shift Register Seqyences: Efficient Event Counters and Easy Discrete Logarithms. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:560-568 [Journal]
   
5. Irith Pomeranz, Sudhakar M. Reddy
   Application of Homing Sequences to Synchronous Sequential Circuit Testing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:569-580 [Journal]
   
6. Majid Sarrafzadeh, Dorothea Wagner, Frank Wagner, Karsten Weihe
   Wiring Knock-Knee Layouts: A Global Approach. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:581-589 [Journal]
   
7. Sulaiman Al-Bassam, Bella Bose
   Asymmetric/Unidirectional Error Correcting and Detecting Codes. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:590-597 [Journal]
   
8. Vernon L. Chi
   Salphasic Distribution of Clock Signals for Synchronous Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:597-602 [Journal]
   
9. Mallika De, Bhabani P. Sinha
   Fast Parallel Algorithm for Ternary Multiplication Using Multivalued I²L Technology. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1994, v:43, n:5, pp:603-607 [Journal]
   
10. Pei-Ji Yang, Sing-Ban Tien, C. S. Raghavendra
    Embedding of Rings and Meshes onto Faulty Hypercubes Using Free Dimensions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:608-613 [Journal]
    
11. Bing-rung Tsai, Kang G. Shin
    Assignment of Task Modules in Hypercube Multicomputers with Component Failures for Communication Efficiency. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:613-618 [Journal]
    
12. David T. Harper III
    A Multiaccess Frame Buffer Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:618-622 [Journal]
    
13. Peter Kornerup
    Digit-Set Conversions: Generalizations and Application. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:622-629 [Journal]
    
14. R. Swaminathan, D. Veeramani
    Decomposition of {0, 1}-Matrices. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:629-633 [Journal]
    
15. Alice M. Tokarnia
    Identifying Minimal Shift Counters: A Search Technique. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1994, v:43, n:5, pp:633-639 [Journal]