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Journals in DBLP

IEEE Trans. Computers
2003, volume: 52, number: 9

  1. Amitabh Mishra, Prithviraj Banerjee
    An Algorithm-Based Error Detection Scheme for the Multigrid Method. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1089-1099 [Journal]
  2. Tomás Lang, Elisardo Antelo
    Radix-4 Reciprocal Square-Root and Its Combination with Division and Square Root. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1100-1114 [Journal]
  3. Jean Arlat, Yves Crouzet, Johan Karlsson, Peter Folkesson, Emmerich Fuchs, Günther H. Leber
    Comparison of Physical and Software-Implemented Fault Injection Techniques. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1115-1133 [Journal]
  4. Jose Flich, Pedro López, Manuel P. Malumbres, José Duato, Tomas Rokicki
    Applying In-Transit Buffers to Boost the Performance of Networks with Source Routing. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1134-1153 [Journal]
  5. Jie Wu
    A Fault-Tolerant and Deadlock-Free Routing Protocol in 2D Meshes Based on Odd-Even Turn Model. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1154-1169 [Journal]
  6. Peter Sanders
    Asynchronous Scheduling of Redundant Disk Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1170-1184 [Journal]
  7. Sanjoy K. Baruah, Shelby Funk, Joël Goossens
    Robustness Results Concerning EDF Scheduling upon Uniform Multiprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1185-1195 [Journal]
  8. Wolfgang Günther, Rolf Drechsler
    Efficient Minimization and Manipulation of Linearly Transformed Binary Decision Diagrams. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1196-1209 [Journal]
  9. Joep Aerts, Jan H. M. Korst, Frits C. R. Spieksma, Wim F. J. Verhaegh, Gerhard J. Woeginger
    Random Redundant Storage in Disk Arrays: Complexity of Retrieval Problems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1210-1214 [Journal]
  10. Alexandre F. Tenca, Çetin Kaya Koç
    A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1215-1221 [Journal]
  11. Khalid H. Abed, Raymond E. Siferd
    VLSI Implementation of a Low-Power Antilogarithmic Converter. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1221-1228 [Journal]
  12. Jong-Hoon Youn, Bella Bose
    Efficient Encoding and Decoding Schemes for Balanced Codes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:9, pp:1229-1232 [Journal]
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