Journals in DBLP

IEEE Trans. Computers
2003, volume: 52, number: 11

1. Viktor K. Prasanna
   Editor's Note. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1377-1378 [Journal]
   
2. Arash Reyhani-Masoleh, M. Anwarul Hasan
   Fast Normal Basis Multiplication Using General Purpose Processors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1379-1390 [Journal]
   
3. Berk Sunar, Erkay Savas, Çetin Kaya Koç
   Constructing Composite Field Representations for Efficient Conversion. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1391-1398 [Journal]
   
4. Costas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos
   Modulo 2n±1 Adder Design Using Select-Prefix Blocks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1399-1406 [Journal]
   
5. Wil Michiels, Jan H. M. Korst, Joep Aerts
   On the Guaranteed Throughput of Multizone Disks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1407-1420 [Journal]
   
6. Khalid H. Abed, Raymond E. Siferd
   CMOS VLSI Implementation of a Low-Power Logarithmic Converter. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1421-1433 [Journal]
   
7. G. Robert Redinbo
   Failure-Detecting Arithmetic Convolutional Codes and an Iterative Correcting Strategy. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1434-1442 [Journal]
   
8. Baback A. Izadi, Füsun Özgüner
   Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1443-1453 [Journal]
   
9. Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob
   The Performance and Energy Consumption of Embedded Real-Time Operating Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 2003, v:52, n:11, pp:1454-1469 [Journal]
   
10. Fred J. Meyer, Nohpill Park
    Predicting Defect-Tolerant Yield in the Embedded Core Context. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1470-1479 [Journal]
    
11. Ismet Bayraktaroglu, Alex Orailoglu
    Concurrent Application of Compaction and Compression for Test Time and Data Volume Reduction in Scan Designs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1480-1489 [Journal]
    
12. Srinath R. Naidu, Vijay Chandru
    On Synthesis of Easily Testable (k, K) Circuits. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1490-1494 [Journal]
    
13. Shlomo Weiss, Shay Beren
    Class-Based Decompressor Design for Compressed Instruction Memory in Embedded Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1495-1500 [Journal]
    
14. Woo-Chan Park, Kil-Whan Lee, Il-San Kim, Tack-Don Han, Sung-Bong Yang
    An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1501-1508 [Journal]
    
15. Behrooz Parhami
    Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1509-1514 [Journal]
    
16. Zhiyuan Yan, Dilip V. Sarwate
    New Systolic Architectures for Inversion and Division in GF(2^m). [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2003, v:52, n:11, pp:1514-1519 [Journal]