Journals in DBLP

IEEE Trans. Computers
1988, volume: 37, number: 11

1. Subhasis Laha, Janak H. Patel, Ravishankar K. Iyer
   Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1325-1336 [Journal]
   
2. Clyde P. Kruskal, Marc Snir, Alan Weiss
   The Distribution of Waiting Times in Clocked Multistage Interconnection Networks. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1337-1352 [Journal]
   
3. Dalibor F. Vrsalovic, Daniel P. Siewiorek, Zary Segall, Edward F. Gehringer
   Performance Prediction and Calibration for a Class of Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1353-1365 [Journal]
   
4. David Bernstein, Haran Boral, Ron Y. Pinter
   Optimal Chaining in Expression Trees. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1366-1374 [Journal]
   
5. Jiro Naganuma, Takeshi Ogura, Shin-Ichiro Yamada, Takashi Kimura
   High-Speed CAM-Based Architecture for a Prolog Machine (ASCA). [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1375-1383 [Journal]
   
6. Virginia Mary Lo
   Heuristic Algorithms for Task Assignment in Distributed Systems. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1384-1397 [Journal]
   
7. Adit D. Singh
   Interstitial Redundancy: An Area Efficient Fault Tolerance Scheme for Large Area VLSI Processor Arrays. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1398-1410 [Journal]
   
8. Peter C. Maxwell
   Comparative Analysis of Different Implementations of Multiple-Input Signature Analyzers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1411-1414 [Journal]
   
9. Jerzy Tyszer
   A Multiple Fault-Tolerant Processor Network Architecture for Pipeline Computing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1988, v:37, n:11, pp:1414-1418 [Journal]
   
10. Henryk Krawczyk, Wojciech E. Kozlowski
    On the Diagnosability of Multicomputer Systems with Homogeneous and Incomplete Tests. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1419-1422 [Journal]
    
11. Uwe Schwiegelshohn, Lothar Thiele
    A Systolic Array for the Assignment Problem. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1422-1425 [Journal]
    
12. Petra De Jong, A. J. van de Goor
    Test Pattern Generation for API Faults in RAM. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1426-1428 [Journal]
    
13. Ferng-Ching Lin, I-Chen Wu
    Broadcast Normalization in Systolic Design. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1428-1434 [Journal]
    
14. Franklin T. Luk, Haesun Park
    Fault-Tolerant Matrix Triangularizations on Systolic Arrays. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1434-1438 [Journal]
    
15. Wen-Tsuen Chen, Jang-Ping Sheu
    Performance Analysis of Multistage Interconnection Networks with Hierarchical Requesting Model. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1438-1442 [Journal]
    
16. Yoshinori Yamamoto, Shiro Fujita
    Relationship Between P-Valued Majority Functions and P-Valued Threshold Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1442-1445 [Journal]
    
17. Kyungsook Y. Lee, Wael Hegazy
    The Extra Stage Gamma Network. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1445-1450 [Journal]
    
18. Nikolaos Gaitanis
    The Design of Totally Self-Checking TMR Fault-Tolerant Systems. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1450-1454 [Journal]
    
19. Ahmed K. Elmagarmid, Ajoy Kumar Datta
    Two-Phase Deadlock Detection Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1454-1458 [Journal]
    
20. Nathalie Homobono, Claudine Peyrat
    Connectivity of Imase and Itoh Digraphs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1459-1461 [Journal]
    
21. S. Aborhey
    Binary Decision Tree Test Functions. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1461-1465 [Journal]
    
22. Kang G. Shin, Parameswaran Ramanathan
    Transmission Delays in Hardware Clock Synchronization. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1465-1467 [Journal]
    
23. David B. Skillicorn
    A New Class of Fault-Tolerant Static Interconnection Networks. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1468-1470 [Journal]
    
24. Behrooz Parhami
    Carry-Free Addition of Recorded Binary Signed-Digit Numbers. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1470-1476 [Journal]
    
25. Che-Liang Yang, Gerald M. Masson
    A Distributed Algorithm for Fault Diagnosis in Systems with Soft Failures. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1476-1480 [Journal]
    
26. Donatella Sciuto, Fabrizio Lombardi
    On Functional Testing of Array Processors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1988, v:37, n:11, pp:1480-1484 [Journal]